temu_MemTransaction Struct Reference

#include <temu-c/Memory/Memory.h>


Data Fields

uint64_t Va
 64 bit virtual for unified 32/64 bit interface.
uint64_t Pa
 64 bit physical address
uint64_t Value
uint8_t Size
uint64_t Offset
void * Initiator
void * Page
uint64_t Cycles
 Cycle cost for memory access (initialised to 0).


Detailed Description

Generic memory transaction.

This type is kept in sync with the emulator core. The layout is guaranteed. and will remain as is, although more fields may be added (at the bottom).

When the emulator core issues a memory transaction (assuming no ATC hit), the core allocates this structure on the stack and fills in some of the fields with default values. The memory transaction is passed by pointer or reference. By filling in the different fields you can adapt the result of the memory transaction.

Definition at line 28 of file Memory.h.


Field Documentation

64 bit virtual for unified 32/64 bit interface.

Definition at line 29 of file Memory.h.

64 bit physical address

Definition at line 30 of file Memory.h.

Resulting value (or written value). On MMIO Reads the model fills in this value, and on writes the written value will be stored here.

Definition at line 35 of file Memory.h.

Two-logarithm of the size of the transaction in bytes it is at most the size of the CPUs max bus size. In case of SPARCv8, this is 4 bytes (double words are issued as two accesses). As this is the 2-log of the size in bytes, a single byte access will have a size of 0, a 2 byte transaction will have size 1, a 4 byte transaction will have size 2 and an 8 byte transaction will have size 3.

Definition at line 44 of file Memory.h.

Used for device models, this will be filled in with the offset from the start address of the device (note it is in practice possible to add a device at multiple locations (which happens in some rare cases)).

Definition at line 50 of file Memory.h.

Initiator of the transaction (a CPU object). It can be null, which indicate that the transaction was not initiated by normal CPU activity (e.g. fetch, read or write). When the initiator is null, models should not attempt to stop the processor core, go to idle mode or raise traps (posting events is fine). An example when the initiator is null is when an MMU does a table walk. The MMU will normally special case handle table walks which access un-mapped memory.

Definition at line 59 of file Memory.h.

Page pointer (for caching), this can be filled in by a memory model to have the emulator core inject the page translation in the ATC. If a model sets this, the page pointer will automatically be cleared if the page has attributes (breakpoints, etc). Models that implement normal memory mapped registers should NOT populate the page pointer.

Definition at line 66 of file Memory.h.

Cycle cost for memory access (initialised to 0).

Definition at line 67 of file Memory.h.


The documentation for this struct was generated from the following file:

Generated on Wed May 27 11:02:19 2015 for T-EMU by  doxygen 1.5.6