include/temu-c/Target/Cpu.h File Reference

#include "temu-c/Support/Objsys.h"
#include <stdint.h>

Include dependency graph for Cpu.h:

Go to the source code of this file.

Data Structures

struct  temu_CpuIface

Defines

#define TEMU_ATC_FETCH   1
 Common CPU interface.
#define TEMU_ATC_READ   (1 << 1)
#define TEMU_ATC_WRITE   (1 << 2)
#define TEMU_ATC_USER   (1 << 3)
#define TEMU_ATC_SUPER   (1 << 4)
#define TEMU_ATC_HYPER   (1 << 5)

Enumerations

enum  temu_CpuState { teCS_Nominal, teCS_Halted, teCS_Idling }
enum  temu_CpuExitReason {
  teCER_Normal = 0, teCER_Trap, teCER_Halt, teCER_Irq,
  teCER_Idle, teCER_Break, teCER_WatchR, teCER_WatchW,
  teCER_Early
}

Functions

 OBJSYS_OBJ_TYPE (temu_Cpu)


Define Documentation

#define TEMU_ATC_FETCH   1

Common CPU interface.

The CPU interface provides common functionality that all processors must implement. This includes the reset and run methods. But also different register access functions. The register access functions are functions, because registers may be banked and we want some type of common interface that can access the current registers. Note that the interface currently only support 32 bit processors.

Warning:
Some functions will not return and execute longjmps to the emulation loop instead. These functions should NOT be called from any C++ code that needs destructors to be called on exit or from any events handlers.
reset The function executing a reset. It takes as parameter the reset type, which is 0 for a default cold reset.

run Run the main emulator loop for a given number of cycles.

step Run the given number of steps. A step is one instruction, completed or not. E.g. a trapping instruction does not complete but is counted as a step.

raiseTrap Raises a trap on the CPU. THIS FUNCTION DOES NOT RETURN!!!

Warning:
The raiseTrap function will normally be constructed using longjmp, that implies that you should not call this from a model which must properly unwind the stack and call destructors on the way.
enterIdleMode Will call longjmp and enter idle mode immediately, this is useful for devices that activates power down mode.
Warning:
This function does not return and destructors will not be called when the stack is unwound.
exitEmuCore Will call longjmp to exit the emulator core. This can be used in certain cases where the other exit functions do not suite well. One being that a reset is called from an MMIO write or read, or from a watchdog event. The reset can otherwise be called when the emulator is not running, so in a model you can call reset and then exitEmuCore.

getGpr Read the currently visible general purpose registers. For banked registers (e.g. SPARC reg windows), you should look at the arch specific interface instead.

getFpr32 Read the currently visible floating point registers.

getSpr Read the currently visible special purpose registers.

invalidateAtc Invalidates the ATC cache for the given address range. Flags can be set to control the invalidation. Bit 0: don't invalidate fetch. Bit 1: don't Invalidate read, bit 2: don't invalidate write, bit 3 don't invalidate user, bit 4 don't invalidate super.

translatePageAddress Does a table walk and translates the virtual address to physical page address. For MMU free systems, the function returns the Va masked with ~(page size-1). Otherwise, the return is the translated page address and in the case of failure -1.

Definition at line 97 of file Cpu.h.

#define TEMU_ATC_HYPER   (1 << 5)

Definition at line 102 of file Cpu.h.

#define TEMU_ATC_READ   (1 << 1)

Definition at line 98 of file Cpu.h.

#define TEMU_ATC_SUPER   (1 << 4)

Definition at line 101 of file Cpu.h.

#define TEMU_ATC_USER   (1 << 3)

Definition at line 100 of file Cpu.h.

#define TEMU_ATC_WRITE   (1 << 2)

Definition at line 99 of file Cpu.h.


Enumeration Type Documentation

Enumerator:
teCER_Normal  Normal exit (cannot be passed to early exit).
teCER_Trap  Exited due to trap (sync trap).
teCER_Halt  Exited due to halting (e.g. sparc error mode).
teCER_Irq  Exited due to interrupt (async trap).
teCER_Idle  Exited to enter idle mode.
teCER_Break  Exited due to breakpoint hit.
teCER_WatchR  Exited due to watchpoint read hit.
teCER_WatchW  Exited due to watchpoint write hit.
teCER_Early  Other early exit reason.

Definition at line 21 of file Cpu.h.

Enumerator:
teCS_Nominal  Normal all ok CPU state.
teCS_Halted  Halted CPU (e.g. SPARC error mode), the CPU can go to the normal state using a reset
teCS_Idling  The CPU is in idle mode. It will not run instructions, only advance the CPUs event queue (until the CPU moves to another mode).

Definition at line 12 of file Cpu.h.


Function Documentation

OBJSYS_OBJ_TYPE ( temu_Cpu   ) 


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