TEMU  3.0
The Terma Emulator
PCIDefines.h
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1 //===------------------------------------------------------------*- C++ -*-===//
2 //
3 // TEMU: The Terma Emulator
4 // (c) Terma 2021
5 // Authors: Daria Vorotnikova <davo (at) terma.com>
6 //
7 //===----------------------------------------------------------------------===//
8 #ifndef TEMU_PCI_DEFINE_H
9 #define TEMU_PCI_DEFINE_H
10 // Base and subclass codes valid for PCI and PCIe
11 #define tePciBc_Pre 0x00
12 #define tePciSc_Any 0x00
13 #define tePciSc_Vga 0x01
14 
15 #define tePciBc_MassStorageController 0x01
16 #define tePciSc_ScsiBusController 0x00
17 #define tePciSc_IdeController 0x01
18 #define tePciSc_FloppyDiskController 0x02
19 #define tePciSc_IpiBusController 0x03
20 #define tePciSc_RaidController 0x04
21 #define tePciSc_AtaController 0x05
22 #define tePciSc_SataController 0x06 // Serial ATA
23 #define tePciSc_SasController 0x07 // Serial attached SCSI
24 #define tePciSc_OtherMassStorageController 0x80
25 
26 #define tePciBc_NetworkController 0x02
27 #define tePciSc_EthernetController 0x00
28 #define tePciSc_TokenRingController 0x01
29 #define tePciSc_FddiController 0x02
30 #define tePciSc_AtmController 0x03
31 #define tePciSc_IsdnController 0x04
32 #define tePciSc_WorldFipController 0x05
33 #define tePciSc_PicmgMultiComputing 0x06
34 #define tePciSc_OtherNetworkController 0x80
35 
36 #define tePciBc_DisplayController 0x03
37 #define tePciSc_VgaController 0x00
38 #define tePciSc_XgaController 0x01
39 #define tePciSc_3dController 0x02
40 #define tePciSc_OtherDisplayController 0x80
41 
42 #define tePciBc_MultimedaiDevice 0x04
43 #define tePciSc_VideoDevice 0x00
44 #define tePciSc_AudioDevice 0x01
45 #define tePciSc_ComptuterTelephonyDevice 0x02
46 #define tePciSc_OtherMultimediaDevice 0x80
47 
48 #define tePciBc_MemoryController 0x05
49 #define tePciSc_RAM 0x00
50 #define tePciSc_Flash 0x01
51 #define tePciSc_OtherMemoryController 0x80
52 
53 #define tePciBc_BridgeDevice 0x06
54 #define tePciSc_HostBridge 0x00
55 #define tePciSc_IsaBridge 0x01
56 #define tePciSc_EisaBridge 0x02
57 #define tePciSc_McaBridge 0x03
58 #define tePciSc_PciToPciBridge 0x04
59 #define tePciSc_PcmciaBridge 0x05
60 #define tePciSc_NuBusBridge 0x06
61 #define tePciSc_CardBusBridge 0x07
62 #define tePciSc_RaceWayBridge 0x08
63 #define tePciSc_SemiTransparentPciToPciBridge 0x09
64 #define tePciSc_InfiniBandToPciHostBridge 0x0a
65 #define tePciSc_OtherBridgeDevice 0x80
66 
67 #define tePciBc_SimpleCommunicationController 0x07
68 #define tePciSc_SerialController 0x00
69 #define tePciSc_ParallelPort 0x01
70 #define tePciSc_MultiPortSerialController 0x02
71 #define tePciSc_Modem 0x03
72 #define tePciSc_GpibController 0x04
73 #define tePciSc_SmartCard 0x05
74 #define tePciSc_OtherCommunicationsDevice 0x80
75 
76 #define tePciBc_BaseSystemPeripheral 0x08
77 #define tePciSc_Pic 0x00
78 #define tePciSc_DmaController 0x01
79 #define tePciSc_SystemTimer 0x02
80 #define tePciSc_RtcController 0x03
81 #define tePciSc_PciHotPlugController 0x04
82 #define tePciSc_SdHostController 0x05
83 #define tePciSc_OtherSystemPeripheral 0x80
84 
85 #define tePciBc_InputDevice 0x09
86 #define tePciSc_KeyboardController 0x00
87 #define tePciSc_Digitizer 0x01
88 #define tePciSc_MouseController 0x02
89 #define tePciSc_ScannerController 0x03
90 #define tePciSc_GameportController 0x04
91 #define tePciSc_OtherInputController 0x80
92 
93 #define tePciBc_DockingStation 0x0a
94 #define tePciSc_GenericDockingStation 0x00
95 #define tePciSc_OtherDockingStation 0x80
96 
97 #define tePciBc_Processor 0x0b
98 #define tePciSc_386 0x00
99 #define tePciSc_486 0x01
100 #define tePciSc_Pentium 0x02
101 #define tePciSc_Alpha 0x10
102 #define tePciSc_PowerPC 0x20
103 #define tePciSc_MIPS 0x30
104 #define tePciSc_CoProcessor 0x40
105 
106 #define tePciBc_SerialBusController 0x0c
107 #define tePciSc_FireWire 0x00
108 #define tePciSc_Ieee1394 0x00
109 #define tePciSc_AccessBus 0x01
110 #define tePciSc_Ssa 0x02
111 #define tePciSc_Usb 0x03
112 #define tePciSc_FibreChannel 0x04
113 #define tePciSc_SystemManagementBus 0x05
114 #define tePciSc_InfiniBand 0x06
115 #define tePciSc_Ipmi 0x07
116 #define tePciSc_SercosInterfaceStandard 0x08
117 #define tePciSc_CanBus 0x09
118 
119 #define tePciBc_WirelessController 0x0d
120 #define tePciSc_IrdaCompatibleController 0x00
121 #define tePciSc_ConsumerIrController 0x01
122 #define tePciSc_RfController 0x10
123 #define tePciSc_BluetoothController 0x11
124 #define tePciSc_BroadbandController 0x12
125 #define tePciSc_Ethernet802_11aController 0x20
126 #define tePciSc_Ethernet802_11bController 0x20
127 #define tePciSc_OtherWirelessController 0x80
128 
129 #define tePciBc_IntellegentIoController 0x0e
130 
131 #define tePciBc_SatelliteCommunicationController 0x0f
132 #define tePciSc_Tv 0x01
133 #define tePciSc_Audio 0x02
134 #define tePciSc_Voice 0x03
135 #define tePciSc_Data 0x04
136 
137 #define tePciBc_EncryptionDecryptionController 0x10
138 #define tePciSc_NetworkAndComputingCrypto 0x00
139 #define tePciSc_EntertainmentCrypto 0x10
140 #define tePciSc_OtherCrypto 0x80
141 
142 #define tePciBc_DataAcquisitionAndSignalProcessingController 0x11
143 #define tePciSc_DpioModules 0x00
144 #define tePciSc_PerformanceCounters 0x01
145 #define tePciSc_CommSyncPlusTimeAndFreq 0x10
146 #define tePciSc_ManagementCard 0x20
147 #define tePciSc_OtherDataAcquisitionSignalProcessingController 0x80
148 
149 #define tePciBc_Unknown 0xff
150 
151 #define tePciBc_EncryptionDecryptionController 0x10
152 
153 #endif // TEMU_PCI_DEFINE_H