45 #define TEMU_ATC_FETCH 1 46 #define TEMU_ATC_READ (1 << 1) 47 #define TEMU_ATC_WRITE (1 << 2) 48 #define TEMU_ATC_USER (1 << 3) 49 #define TEMU_ATC_SUPER (1 << 4) 50 #define TEMU_ATC_HYPER (1 << 5) 169 void (*
reset)(
void *Cpu,
int ResetType);
183 void (*
setPc)(
void *Cpu, uint64_t Pc);
185 void (*
setGpr)(
void *Cpu,
int Reg, uint64_t Value);
186 uint64_t (*
getGpr)(
void *Cpu,
unsigned Reg);
187 void (*
setFpr32)(
void *Cpu,
unsigned Reg, uint32_t Value);
189 void (*
setFpr64)(
void *Cpu,
unsigned Reg, uint64_t Value);
191 void (*
setSpr)(
void *Cpu,
unsigned Reg, uint64_t Value);
192 uint64_t (*
getSpr)(
void *Cpu,
unsigned Reg);
194 const char* (*getRegName)(
void *Cpu,
int RegId);
195 uint32_t (*
assemble)(
void *Cpu,
const char *AsmStr);
196 char* (*disassemble)(
void *Cpu, uint32_t Instr);
213 void* (*getMachine)(
void *Cpu);
216 const char* (*getTrapName)(
void *Cpu,
int Trap);
224 void* (*translateIRAddress)(
void *Obj, uint64_t Va);
240 #define TEMU_CPU_IFACE_TYPE "temu::CpuIface" 255 #define TEMU_INSTR_BRANCH (1 << 0) 256 #define TEMU_INSTR_INDIRECT_BRANCH (1 << 1) 257 #define TEMU_INSTR_LOAD (1 << 2) 258 #define TEMU_INSTR_STORE (1 << 3) 259 #define TEMU_INSTR_INTEGER (1 << 4) 260 #define TEMU_INSTR_FLOAT (1 << 5) 261 #define TEMU_INSTR_ARITHMETIC (1 << 6) 262 #define TEMU_INSTR_ANNULLED (1 << 7) 263 #define TEMU_INSTR_UNCOND (1 << 8) 264 #define TEMU_INSTR_UNCOND_NEVER (1 << 9) 265 #define TEMU_INSTR_ON_PAGE (1 << 10) 266 #define TEMU_INSTR_MODE_SWITCH (1 << 11) 267 #define TEMU_INSTR_ILLEGAL (1 << 12) 268 #define TEMU_INSTR_NO_DBT (1 << 13) 275 void (*profileCounterOverflow)(
void *Obj, uint64_t VA);
277 void (*wrotePage)(
void *Obj, uint64_t Va, uint64_t Pa);
279 void* (*getRawRuntime)(
void *Obj);
281 #define TEMU_TARGET_EXEC_IFACE_TYPE "temu::TargetExecutionIface" 284 #define TEMU_STICKY_DO_NOT_EXIT_AT_HALT 1 285 #define TEMU_STICKY_PROFILE_MODE 2 286 #define TEMU_STICKY_DISABLE_IDLE (1 << 2) 296 void (*setResetAddress)(
void *Obj, uint64_t Address);
298 #define TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE "temu::DynamicResetAddressIface" 315 void (*enableBinaryTranslator)(
void *Obj);
317 void (*disableBinaryTranslator)(
void *Obj);
319 void (*setThreshold)(
void *Obj,
unsigned Threshold);
321 int (*translateInstructions)(
void *Obj, uint64_t VA, uint64_t PA,
unsigned NumInstructions);
323 int (*translateBlock)(
void *Obj, uint64_t VA, uint64_t PA);
325 int (*translateFunc)(
void *Obj, uint64_t VA, uint64_t PA);
327 int (*chainBlocks)(
void *Obj, uint64_t SourceBlockPA, uint64_t TargetBlockPA,
int TakenArm);
329 const char* (*disassembleBlock)(
void *Obj, uint64_t PA);
332 int (*clearBlock)(
void *Obj, uint64_t PA);
334 int (*clearBlocksOnPage)(
void *Obj, uint64_t PA);
345 #define TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE "temu::BinaryTranslationControlIface" int64_t(* getIdleCycles)(void *Cpu)
Definition: Cpu.h:238
Exited due to watchpoint read hit.
Definition: Cpu.h:38
int(* getRegId)(void *Cpu, const char *RegName)
Definition: Cpu.h:193
uint32_t(* getFpr32)(void *Cpu, unsigned Reg)
Definition: Cpu.h:188
void(* setPowerState)(void *Cpu, temu_PowerState Ps)
Definition: Cpu.h:205
int64_t(* getCycles)(void *Cpu)
Definition: Cpu.h:180
uint32_t OldMode
Old processor privilege level.
Definition: Cpu.h:250
Emulator panic (e.g. illegal mode transition)
Definition: Cpu.h:41
Can switch at runtime.
Definition: Cpu.h:58
Number of translated instructions.
Definition: Cpu.h:306
unsigned GPRCount
GPR register count.
Definition: Cpu.h:73
uint64_t(* getGpr)(void *Cpu, unsigned Reg)
Definition: Cpu.h:186
unsigned NumInstructionSets
Number of instruction sets.
Definition: Cpu.h:79
void(* setGpr)(void *Cpu, int Reg, uint64_t Value)
Definition: Cpu.h:185
Number of executed blocks.
Definition: Cpu.h:309
temu_CpuState
Definition: Cpu.h:21
const char * ModelName
Processor model name.
Definition: Cpu.h:66
Always little endian.
Definition: Cpu.h:56
void __attribute__((noreturn))(*raiseTrap)(void *Obj
Other early exit reason.
Definition: Cpu.h:40
Exited due to watchpoint write hit.
Definition: Cpu.h:39
void(* setFpr64)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:189
void temu_CpuExitReason Reason
Definition: Cpu.h:177
uint64_t(* getFreq)(void *Cpu)
Definition: Cpu.h:179
unsigned VATypeSize
Virtual address type size in bytes.
Definition: Cpu.h:70
unsigned PASize
Physical address size in bits.
Definition: Cpu.h:69
uint64_t(* translateAddress)(void *Cpu, uint64_t Va, uint32_t *Flags)
Definition: Cpu.h:202
temu_PowerState
Used to indicate whether a model is powered on.
Definition: Power.h:23
unsigned PATypeSize
Physical address type size in bytes (i.e. 8 for 36 bit PA)
Definition: Cpu.h:71
void(* setPc)(void *Cpu, uint64_t Pc)
Definition: Cpu.h:183
void(* disableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:211
uint32_t NewMode
New processor privilege level.
Definition: Cpu.h:251
uint64_t PC
Program counter when trap occurred.
Definition: Cpu.h:245
Always big endian.
Definition: Cpu.h:57
void(* disableTraps)(void *Cpu)
Definition: Cpu.h:198
void(* enableTraps)(void *Cpu)
Definition: Cpu.h:197
int(* wakeUp)(void *Cpu)
Definition: Cpu.h:220
int64_t(* getIdleSteps)(void *Cpu)
Definition: Cpu.h:237
int64_t(* getSteps)(void *Cpu)
Definition: Cpu.h:181
void(* enableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:230
Normal all ok CPU state.
Definition: Cpu.h:22
Exited due to breakpoint hit.
Definition: Cpu.h:37
temu_CpuState(* getState)(void *Cpu)
Definition: Cpu.h:182
temu_BTStatID
Definition: Cpu.h:305
void(* disableProfiling)(void *Obj)
Definition: Cpu.h:234
void(* enableTrapEvents)(void *Cpu)
Definition: Cpu.h:207
Number of translated blocks.
Definition: Cpu.h:308
Exited due to halting (e.g. sparc error mode)
Definition: Cpu.h:34
uint64_t nPC
Only valid for targets with delay slots.
Definition: Cpu.h:246
temu_Endian
< Endianness of target architecture
Definition: Cpu.h:55
temu_CpuExitReason(* run)(void *Cpu, uint64_t Cycles)
Definition: Cpu.h:170
void(* enterIdleMode)(void *Obj)
Definition: Cpu.h:176
void int Trap
Definition: Cpu.h:175
uint32_t(* assemble)(void *Cpu, const char *AsmStr)
Definition: Cpu.h:195
void(* forceEarlyExit)(void *Cpu)
Definition: Cpu.h:223
void(* reset)(void *Cpu, int ResetType)
Definition: Cpu.h:169
temu_CpuExitReason
Definition: Cpu.h:31
temu_Endian DataEndianess
Data endianness.
Definition: Cpu.h:77
uint32_t TrapId
Trap number (architecture specific)
Definition: Cpu.h:244
void(* setSpr)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:191
void(* enableProfiling)(void *Obj)
Definition: Cpu.h:233
temu_CpuExitReason(* runUntil)(void *Cpu, uint64_t Cycles)
Definition: Cpu.h:171
void(* raiseTrapNoJmp)(void *Cpu, int Trap)
Definition: Cpu.h:214
const char * ArchName
Architecture name.
Definition: Cpu.h:65
Translated code size in bytes.
Definition: Cpu.h:310
Number of executed instructions.
Definition: Cpu.h:307
void(* enableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:210
Normal exit (cannot be passed to early exit)
Definition: Cpu.h:32
uint64_t(* getSpr)(void *Cpu, unsigned Reg)
Definition: Cpu.h:192
void(* flushProfileCaches)(void *Obj)
Definition: Cpu.h:235
TEMU_IFACE_REFERENCE_TYPE(temu_Cpu)
Exited due to trap (sync trap)
Definition: Cpu.h:33
unsigned FPRCount
FPR register count.
Definition: Cpu.h:74
struct temu_CpuIface temu_CpuIface
void(* invalidateAtc)(void *Obj, uint64_t Addr, uint64_t Pages, uint32_t Flags)
Definition: Cpu.h:199
void(* setFpr32)(void *Cpu, unsigned Reg, uint32_t Value)
Definition: Cpu.h:187
temu_Endian InstructionEndianess
Instruction endianness.
Definition: Cpu.h:76
temu_CpuExitReason(* step)(void *Cpu, uint64_t Steps)
Definition: Cpu.h:172
unsigned VASize
Virtual address size in bits.
Definition: Cpu.h:68
void(* disableTrapEvents)(void *Cpu)
Definition: Cpu.h:208
temu_PowerState(* getPowerState)(void *Cpu)
Definition: Cpu.h:204
temu_CpuExitReason(* stepUntil)(void *Cpu, uint64_t Steps, uint64_t Cycles)
Definition: Cpu.h:173
void(* disableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:231
uint64_t(* getFpr64)(void *Cpu, unsigned Reg)
Definition: Cpu.h:190
uint64_t(* getPc)(void *Cpu)
Definition: Cpu.h:184