TEMU  3.0
The Terma Emulator
temu_PCIExpressConfig Struct Reference

#include </builds/termade/temu/temu/include/temu-c/Bus/PCIExpress.h>

Collaboration diagram for temu_PCIExpressConfig:

Data Fields

uint32_t DeviceVendorID
 
uint32_t StatusCommand
 
uint32_t ClassCodeRevID
 
uint32_t BISTHeaderTypeLatencyTimerCacheLineSize
 
uint32_t CapPointer
 
uint32_t ExpansionROMBaseAddress
 
temu_PCIeConfigType0 ConfigType0
 
temu_PCIeConfigType1 ConfigType1
 
uint16_t AdvancedErrorReportingCapIdReg
 
uint32_t UncorrectableErrorStatusReg
 
uint32_t UncorrectableErrorMaskReg
 
uint32_t UncorrectableErrorSeverityReg
 
uint32_t CorrectableErrorStatusReg
 
uint32_t CorrectableErrorMaskReg
 
uint32_t AdvancedErrorCapabilitiesControlReg
 
uint32_t HeaderLogReg [4]
 
uint32_t RootErrorCommandReg
 
uint32_t RootErrorStatusReg
 
uint32_t CorrectableErrorSourceIdReg
 
temu_PCIeDeviceSpecificConfigSpace PCIeDevConfig
 
temu_PCIeControllerInternalCSRs PCIeController
 

Detailed Description

temu_PCIExpressConfig: PCI Express configuration space registers

Field Documentation

◆ AdvancedErrorCapabilitiesControlReg

uint32_t temu_PCIExpressConfig::AdvancedErrorCapabilitiesControlReg

◆ AdvancedErrorReportingCapIdReg

uint16_t temu_PCIExpressConfig::AdvancedErrorReportingCapIdReg

◆ BISTHeaderTypeLatencyTimerCacheLineSize

uint32_t temu_PCIExpressConfig::BISTHeaderTypeLatencyTimerCacheLineSize

◆ CapPointer

uint32_t temu_PCIExpressConfig::CapPointer

◆ ClassCodeRevID

uint32_t temu_PCIExpressConfig::ClassCodeRevID

◆ ConfigType0

temu_PCIeConfigType0 temu_PCIExpressConfig::ConfigType0

◆ ConfigType1

temu_PCIeConfigType1 temu_PCIExpressConfig::ConfigType1

◆ CorrectableErrorMaskReg

uint32_t temu_PCIExpressConfig::CorrectableErrorMaskReg

◆ CorrectableErrorSourceIdReg

uint32_t temu_PCIExpressConfig::CorrectableErrorSourceIdReg

◆ CorrectableErrorStatusReg

uint32_t temu_PCIExpressConfig::CorrectableErrorStatusReg

◆ DeviceVendorID

uint32_t temu_PCIExpressConfig::DeviceVendorID

◆ ExpansionROMBaseAddress

uint32_t temu_PCIExpressConfig::ExpansionROMBaseAddress

◆ HeaderLogReg

uint32_t temu_PCIExpressConfig::HeaderLogReg[4]

◆ PCIeController

temu_PCIeControllerInternalCSRs temu_PCIExpressConfig::PCIeController

◆ PCIeDevConfig

temu_PCIeDeviceSpecificConfigSpace temu_PCIExpressConfig::PCIeDevConfig

◆ RootErrorCommandReg

uint32_t temu_PCIExpressConfig::RootErrorCommandReg

◆ RootErrorStatusReg

uint32_t temu_PCIExpressConfig::RootErrorStatusReg

◆ StatusCommand

uint32_t temu_PCIExpressConfig::StatusCommand

◆ UncorrectableErrorMaskReg

uint32_t temu_PCIExpressConfig::UncorrectableErrorMaskReg

◆ UncorrectableErrorSeverityReg

uint32_t temu_PCIExpressConfig::UncorrectableErrorSeverityReg

◆ UncorrectableErrorStatusReg

uint32_t temu_PCIExpressConfig::UncorrectableErrorStatusReg

The documentation for this struct was generated from the following file: