43 #define TEMU_ATC_FETCH 1 44 #define TEMU_ATC_READ (1 << 1) 45 #define TEMU_ATC_WRITE (1 << 2) 46 #define TEMU_ATC_USER (1 << 3) 47 #define TEMU_ATC_SUPER (1 << 4) 48 #define TEMU_ATC_HYPER (1 << 5) 168 void (*
reset)(
void *Cpu,
int ResetType);
183 void (*
setPc)(
void *Cpu, uint64_t Pc);
185 void (*
setGpr)(
void *Cpu,
int Reg, uint64_t Value);
186 uint64_t (*
getGpr)(
void *Cpu,
unsigned Reg);
187 void (*
setFpr32)(
void *Cpu,
unsigned Reg, uint32_t Value);
189 void (*
setFpr64)(
void *Cpu,
unsigned Reg, uint64_t Value);
191 void (*
setSpr)(
void *Cpu,
unsigned Reg, uint64_t Value);
192 uint64_t (*
getSpr)(
void *Cpu,
unsigned Reg);
194 const char *(*getRegName)(
void *Cpu,
int RegId);
195 uint32_t (*
assemble)(
void *Cpu,
const char *AsmStr);
196 char *(*disassemble)(
void *Cpu, uint32_t Instr);
213 void *(*getMachine)(
void *Cpu);
216 const char *(*getTrapName)(
void *Cpu,
int Trap);
224 void *(*translateIRAddress)(
void *Obj, uint64_t Va);
242 #define TEMU_CPU_IFACE_TYPE "temu::CpuIface" 257 #define TEMU_INSTR_BRANCH (1 << 0) 258 #define TEMU_INSTR_INDIRECT_BRANCH (1 << 1) 259 #define TEMU_INSTR_LOAD (1 << 2) 260 #define TEMU_INSTR_STORE (1 << 3) 261 #define TEMU_INSTR_INTEGER (1 << 4) 262 #define TEMU_INSTR_FLOAT (1 << 5) 263 #define TEMU_INSTR_ARITHMETIC (1 << 6) 264 #define TEMU_INSTR_ANNULLED (1 << 7) 265 #define TEMU_INSTR_UNCOND (1 << 8) 266 #define TEMU_INSTR_UNCOND_NEVER (1 << 9) 267 #define TEMU_INSTR_ON_PAGE (1 << 10) 268 #define TEMU_INSTR_MODE_SWITCH (1 << 11) 269 #define TEMU_INSTR_ILLEGAL (1 << 12) 270 #define TEMU_INSTR_NO_DBT (1 << 13) 277 void (*profileCounterOverflow)(
void *Obj, uint64_t VA);
279 void (*wrotePage)(
void *Obj, uint64_t Va, uint64_t Pa);
281 void *(*getRawRuntime)(
void *Obj);
283 #define TEMU_TARGET_EXEC_IFACE_TYPE "temu::TargetExecutionIface" 286 #define TEMU_STICKY_DO_NOT_EXIT_AT_HALT 1 287 #define TEMU_STICKY_PROFILE_MODE 2 288 #define TEMU_STICKY_DISABLE_IDLE (1 << 2) 298 void (*setResetAddress)(
void *Obj, uint64_t Address);
300 #define TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE "temu::DynamicResetAddressIface" 316 void (*enableBinaryTranslator)(
void *Obj);
318 void (*disableBinaryTranslator)(
void *Obj);
320 void (*setThreshold)(
void *Obj,
unsigned Threshold);
322 int (*translateInstructions)(
void *Obj, uint64_t VA, uint64_t PA,
323 unsigned NumInstructions);
326 int (*translateBlock)(
void *Obj, uint64_t VA, uint64_t PA);
329 int (*translateFunc)(
void *Obj, uint64_t VA, uint64_t PA);
331 int (*chainBlocks)(
void *Obj, uint64_t SourceBlockPA, uint64_t TargetBlockPA,
334 const char *(*disassembleBlock)(
void *Obj, uint64_t PA);
337 int (*clearBlock)(
void *Obj, uint64_t PA);
339 int (*clearBlocksOnPage)(
void *Obj, uint64_t PA);
350 #define TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE \ 351 "temu::BinaryTranslationControlIface" int64_t(* getIdleCycles)(void *Cpu)
Definition: Cpu.h:238
Exited due to watchpoint read hit.
Definition: Cpu.h:36
int(* getRegId)(void *Cpu, const char *RegName)
Definition: Cpu.h:193
uint32_t(* getFpr32)(void *Cpu, unsigned Reg)
Definition: Cpu.h:188
void(* setPowerState)(void *Cpu, temu_PowerState Ps)
Definition: Cpu.h:205
int64_t(* getCycles)(void *Cpu)
Definition: Cpu.h:180
uint32_t OldMode
Old processor privilege level.
Definition: Cpu.h:252
Emulator panic (e.g. illegal mode transition)
Definition: Cpu.h:39
Can switch at runtime.
Definition: Cpu.h:56
Number of translated instructions.
Definition: Cpu.h:307
unsigned GPRCount
GPR register count.
Definition: Cpu.h:72
uint64_t(* getGpr)(void *Cpu, unsigned Reg)
Definition: Cpu.h:186
unsigned NumInstructionSets
Number of instruction sets.
Definition: Cpu.h:78
void(* setGpr)(void *Cpu, int Reg, uint64_t Value)
Definition: Cpu.h:185
Number of executed blocks.
Definition: Cpu.h:310
temu_CpuState
Definition: Cpu.h:20
const char * ModelName
Processor model name.
Definition: Cpu.h:64
Always little endian.
Definition: Cpu.h:54
void __attribute__((noreturn))(*raiseTrap)(void *Obj
Other early exit reason.
Definition: Cpu.h:38
Exited due to watchpoint write hit.
Definition: Cpu.h:37
void(* setFpr64)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:189
void temu_CpuExitReason Reason
Definition: Cpu.h:177
uint64_t(* getFreq)(void *Cpu)
Definition: Cpu.h:179
unsigned VATypeSize
Virtual address type size in bytes.
Definition: Cpu.h:68
unsigned PASize
Physical address size in bits.
Definition: Cpu.h:67
uint64_t(* translateAddress)(void *Cpu, uint64_t Va, uint32_t *Flags)
Definition: Cpu.h:202
temu_PowerState
Used to indicate whether a model is powered on.
Definition: Power.h:23
unsigned PATypeSize
Definition: Cpu.h:69
void(* setPc)(void *Cpu, uint64_t Pc)
Definition: Cpu.h:183
void(* disableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:211
uint32_t NewMode
New processor privilege level.
Definition: Cpu.h:253
uint64_t PC
Program counter when trap occurred.
Definition: Cpu.h:247
Always big endian.
Definition: Cpu.h:55
void(* disableTraps)(void *Cpu)
Definition: Cpu.h:198
void(* enableTraps)(void *Cpu)
Definition: Cpu.h:197
int(* wakeUp)(void *Cpu)
Definition: Cpu.h:220
int64_t(* getIdleSteps)(void *Cpu)
Definition: Cpu.h:237
int64_t(* getSteps)(void *Cpu)
Definition: Cpu.h:181
void(* enableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:230
Normal all ok CPU state.
Definition: Cpu.h:21
Exited due to breakpoint hit.
Definition: Cpu.h:35
temu_CpuState(* getState)(void *Cpu)
Definition: Cpu.h:182
temu_BTStatID
Definition: Cpu.h:306
void(* disableProfiling)(void *Obj)
Definition: Cpu.h:234
void(* enableTrapEvents)(void *Cpu)
Definition: Cpu.h:207
Number of translated blocks.
Definition: Cpu.h:309
Exited due to halting (e.g. sparc error mode)
Definition: Cpu.h:32
uint64_t nPC
Only valid for targets with delay slots.
Definition: Cpu.h:248
temu_Endian
< Endianness of target architecture
Definition: Cpu.h:53
temu_CpuExitReason(* run)(void *Cpu, uint64_t Cycles)
Definition: Cpu.h:169
void(* enterIdleMode)(void *Obj)
Definition: Cpu.h:175
void int Trap
Definition: Cpu.h:174
uint32_t(* assemble)(void *Cpu, const char *AsmStr)
Definition: Cpu.h:195
void(* forceEarlyExit)(void *Cpu)
Definition: Cpu.h:223
void(* reset)(void *Cpu, int ResetType)
Definition: Cpu.h:168
temu_CpuExitReason
Definition: Cpu.h:29
temu_Endian DataEndianess
Data endianness.
Definition: Cpu.h:76
uint32_t TrapId
Trap number (architecture specific)
Definition: Cpu.h:246
void(* setSpr)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:191
void(* enableProfiling)(void *Obj)
Definition: Cpu.h:233
temu_CpuExitReason(* runUntil)(void *Cpu, uint64_t Cycles)
Definition: Cpu.h:170
void(* raiseTrapNoJmp)(void *Cpu, int Trap)
Definition: Cpu.h:214
const char * ArchName
Architecture name.
Definition: Cpu.h:63
Translated code size in bytes.
Definition: Cpu.h:311
Number of executed instructions.
Definition: Cpu.h:308
void(* enableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:210
Normal exit (cannot be passed to early exit)
Definition: Cpu.h:30
uint64_t(* getSpr)(void *Cpu, unsigned Reg)
Definition: Cpu.h:192
void(* flushProfileCaches)(void *Obj)
Definition: Cpu.h:235
TEMU_IFACE_REFERENCE_TYPE(temu_Cpu)
Exited due to trap (sync trap)
Definition: Cpu.h:31
unsigned FPRCount
FPR register count.
Definition: Cpu.h:73
struct temu_CpuIface temu_CpuIface
void(* invalidateAtc)(void *Obj, uint64_t Addr, uint64_t Pages, uint32_t Flags)
Definition: Cpu.h:199
void(* setFpr32)(void *Cpu, unsigned Reg, uint32_t Value)
Definition: Cpu.h:187
void(* enterHaltedMode)(void *Obj)
Definition: Cpu.h:239
temu_Endian InstructionEndianess
Instruction endianness.
Definition: Cpu.h:75
temu_CpuExitReason(* step)(void *Cpu, uint64_t Steps)
Definition: Cpu.h:171
unsigned VASize
Virtual address size in bits.
Definition: Cpu.h:66
void(* disableTrapEvents)(void *Cpu)
Definition: Cpu.h:208
temu_PowerState(* getPowerState)(void *Cpu)
Definition: Cpu.h:204
temu_CpuExitReason(* stepUntil)(void *Cpu, uint64_t Steps, uint64_t Cycles)
Definition: Cpu.h:172
void(* disableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:231
uint64_t(* getFpr64)(void *Cpu, unsigned Reg)
Definition: Cpu.h:190
uint64_t(* getPc)(void *Cpu)
Definition: Cpu.h:184