10 #define TEMU_BUS_PCI_H
14 #include "temu-c/Bus/PCIDefines.h"
15 #include "temu-c/Memory/Memory.h"
16 #include "temu-c/Support/Logging.h"
17 #include "temu-c/Support/Objsys.h"
26 } temu_PCIDeviceVTable;
42 void (*
mapPciIo)(temu_Object *Obj,
unsigned Device,
unsigned Bar,
43 uint64_t Addr, uint64_t Len);
45 void (*
mapPciMem)(temu_Object *Obj,
unsigned Device,
unsigned Bar,
46 uint64_t Addr, uint64_t Len);
49 TEMU_IFACE_REFERENCE_TYPE(temu_PCIBus)
50 #define TEMU_PCI_BUS_IFACE_TYPE "temu::PCIBusIface"
57 } temu_PCIBridgeIface;
58 TEMU_IFACE_REFERENCE_TYPE(temu_PCIBridge)
59 #define TEMU_PCI_BRIDGE_IFACE_TYPE "temu::PCIBridgeIface"
64 temu_PCIConfig *(*getPciConfig)(temu_Object *);
67 uint32_t (*readConfig)(temu_Object *Obj, uint32_t offset);
68 uint64_t (*getPciBarSize)(temu_Object *,
unsigned bar);
69 uint64_t (*getPciExpansionROMSize)(temu_Object *);
71 } temu_PCIDeviceIface;
72 TEMU_IFACE_REFERENCE_TYPE(temu_PCIDevice)
73 #define TEMU_PCI_DEVICE_IFACE_TYPE "temu::PCIDeviceIface"
81 temu_pciDeviceRegister(temu_Class *C)
83 temu_addProperty(C,
"pciConfigDeviceVendorID",
84 offsetof(temu_PCIDevice, Conf.DeviceVendorID), teTY_U32,
86 NULL, NULL,
"PCI Device and Vendor ID");
88 temu_addProperty(C,
"pciConfigStatusCommand",
89 offsetof(temu_PCIDevice, Conf.StatusCommand), teTY_U32,
91 NULL, NULL,
"PCI Status and Command Register");
93 temu_addProperty(C,
"pciConfigClassCodeRevID",
94 offsetof(temu_PCIDevice, Conf.ClassCodeRevID), teTY_U32,
96 NULL, NULL,
"PCI Class Code and Revision ID");
99 C,
"pciConfigBistHeaderLatencyCacheLineAndSize",
100 offsetof(temu_PCIDevice, Conf.BISTHeaderTypeLatencyTimerCacheLineSize),
103 NULL, NULL,
"PCI BIST, Header Type, Latency and cache line size");
105 temu_addProperty(C,
"pciConfigBAR", offsetof(temu_PCIDevice, Conf.BAR),
108 NULL, NULL,
"PCI Base Address Registers");
110 temu_addProperty(C,
"pciConfigCardbusCISPointer",
111 offsetof(temu_PCIDevice, Conf.CardbusCISPointer), teTY_U32,
113 NULL, NULL,
"PCI Cardbus CIS Pointer");
115 temu_addProperty(C,
"pciConfigSubsystemVendorID",
116 offsetof(temu_PCIDevice, Conf.SubsystemVendorID), teTY_U32,
118 NULL, NULL,
"PCI Subsystem and Subsystem Vendor ID");
120 temu_addProperty(C,
"pciConfigExpansionROMBaseAddress",
121 offsetof(temu_PCIDevice, Conf.ExpansionROMBaseAddress),
124 NULL, NULL,
"PCI Expansion ROM base address");
126 temu_addProperty(C,
"pciConfigCapabilityPointer",
127 offsetof(temu_PCIDevice, Conf.CapPointer), teTY_U32,
129 NULL, NULL,
"PCI Capability list pointer");
132 C,
"pciConfigMaxLatMinGntIntPinLine",
133 offsetof(temu_PCIDevice, Conf.MaxLatMinGntIntPinLine), teTY_U32,
135 NULL, NULL,
"PCI Max latency, min gnt, int pin and int line");
139 temu_pciSetDeviceId(temu_PCIConfig *C, uint16_t Val)
145 temu_pciSetVendorId(temu_PCIConfig *C, uint16_t Val)
151 temu_pciSetStatus(temu_PCIConfig *C, uint16_t Val)
157 temu_pciSetClassCode(temu_PCIConfig *C, uint32_t Val)
164 temu_pciSetRevId(temu_PCIConfig *C, uint8_t Val)
171 temu_pciSetBist(temu_PCIConfig *C, uint8_t Val)
174 ((uint32_t)Val << 24) |
179 temu_pciSetHeaderType(temu_PCIConfig *C, uint8_t Val)
182 ((uint32_t)Val << 16) |
187 temu_pciSetLatencyTimer(temu_PCIConfig *C, uint8_t Val)
190 ((uint32_t)Val << 8) |
195 temu_pciSetCacheLineSize(temu_PCIConfig *C, uint8_t Val)
198 ((uint32_t)Val << 0) |
203 temu_pciSetInterruptPin(temu_PCIConfig *C, uint8_t Val)
211 temu_pciSetSubsystemId(temu_PCIConfig *C, uint16_t Val)
218 temu_pciSetSubsystemVendorId(temu_PCIConfig *C, uint16_t Val)