TEMU  4.2
The Terma Emulator
PCIDefines.h
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1 //===------------------------------------------------------------*- C++ -*-===//
2 //
3 // TEMU: The Terma Emulator
4 // (c) Terma 2021
5 // Authors: Daria Vorotnikova <davo (at) terma.com>
6 //
7 //===----------------------------------------------------------------------===//
8 #ifndef TEMU_PCI_DEFINE_H
9 #define TEMU_PCI_DEFINE_H
10 
11 //===----------------------------------------------------------------------===//
12 //
13 // NOTE: PCI and PCIe interfaces is an experimental and unstable API
14 // It is subject to change until it is deemed stable enough.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 // Base and subclass codes valid for PCI and PCIe
19 #define tePciBc_Pre 0x00
20 #define tePciSc_Any 0x00
21 #define tePciSc_Vga 0x01
22 
23 #define tePciBc_MassStorageController 0x01
24 #define tePciSc_ScsiBusController 0x00
25 #define tePciSc_IdeController 0x01
26 #define tePciSc_FloppyDiskController 0x02
27 #define tePciSc_IpiBusController 0x03
28 #define tePciSc_RaidController 0x04
29 #define tePciSc_AtaController 0x05
30 #define tePciSc_SataController 0x06 // Serial ATA
31 #define tePciSc_SasController 0x07 // Serial attached SCSI
32 #define tePciSc_OtherMassStorageController 0x80
33 
34 #define tePciBc_NetworkController 0x02
35 #define tePciSc_EthernetController 0x00
36 #define tePciSc_TokenRingController 0x01
37 #define tePciSc_FddiController 0x02
38 #define tePciSc_AtmController 0x03
39 #define tePciSc_IsdnController 0x04
40 #define tePciSc_WorldFipController 0x05
41 #define tePciSc_PicmgMultiComputing 0x06
42 #define tePciSc_OtherNetworkController 0x80
43 
44 #define tePciBc_DisplayController 0x03
45 #define tePciSc_VgaController 0x00
46 #define tePciSc_XgaController 0x01
47 #define tePciSc_3dController 0x02
48 #define tePciSc_OtherDisplayController 0x80
49 
50 #define tePciBc_MultimedaiDevice 0x04
51 #define tePciSc_VideoDevice 0x00
52 #define tePciSc_AudioDevice 0x01
53 #define tePciSc_ComptuterTelephonyDevice 0x02
54 #define tePciSc_OtherMultimediaDevice 0x80
55 
56 #define tePciBc_MemoryController 0x05
57 #define tePciSc_RAM 0x00
58 #define tePciSc_Flash 0x01
59 #define tePciSc_OtherMemoryController 0x80
60 
61 #define tePciBc_BridgeDevice 0x06
62 #define tePciSc_HostBridge 0x00
63 #define tePciSc_IsaBridge 0x01
64 #define tePciSc_EisaBridge 0x02
65 #define tePciSc_McaBridge 0x03
66 #define tePciSc_PciToPciBridge 0x04
67 #define tePciSc_PcmciaBridge 0x05
68 #define tePciSc_NuBusBridge 0x06
69 #define tePciSc_CardBusBridge 0x07
70 #define tePciSc_RaceWayBridge 0x08
71 #define tePciSc_SemiTransparentPciToPciBridge 0x09
72 #define tePciSc_InfiniBandToPciHostBridge 0x0a
73 #define tePciSc_OtherBridgeDevice 0x80
74 
75 #define tePciBc_SimpleCommunicationController 0x07
76 #define tePciSc_SerialController 0x00
77 #define tePciSc_ParallelPort 0x01
78 #define tePciSc_MultiPortSerialController 0x02
79 #define tePciSc_Modem 0x03
80 #define tePciSc_GpibController 0x04
81 #define tePciSc_SmartCard 0x05
82 #define tePciSc_OtherCommunicationsDevice 0x80
83 
84 #define tePciBc_BaseSystemPeripheral 0x08
85 #define tePciSc_Pic 0x00
86 #define tePciSc_DmaController 0x01
87 #define tePciSc_SystemTimer 0x02
88 #define tePciSc_RtcController 0x03
89 #define tePciSc_PciHotPlugController 0x04
90 #define tePciSc_SdHostController 0x05
91 #define tePciSc_OtherSystemPeripheral 0x80
92 
93 #define tePciBc_InputDevice 0x09
94 #define tePciSc_KeyboardController 0x00
95 #define tePciSc_Digitizer 0x01
96 #define tePciSc_MouseController 0x02
97 #define tePciSc_ScannerController 0x03
98 #define tePciSc_GameportController 0x04
99 #define tePciSc_OtherInputController 0x80
100 
101 #define tePciBc_DockingStation 0x0a
102 #define tePciSc_GenericDockingStation 0x00
103 #define tePciSc_OtherDockingStation 0x80
104 
105 #define tePciBc_Processor 0x0b
106 #define tePciSc_386 0x00
107 #define tePciSc_486 0x01
108 #define tePciSc_Pentium 0x02
109 #define tePciSc_Alpha 0x10
110 #define tePciSc_PowerPC 0x20
111 #define tePciSc_MIPS 0x30
112 #define tePciSc_CoProcessor 0x40
113 
114 #define tePciBc_SerialBusController 0x0c
115 #define tePciSc_FireWire 0x00
116 #define tePciSc_Ieee1394 0x00
117 #define tePciSc_AccessBus 0x01
118 #define tePciSc_Ssa 0x02
119 #define tePciSc_Usb 0x03
120 #define tePciSc_FibreChannel 0x04
121 #define tePciSc_SystemManagementBus 0x05
122 #define tePciSc_InfiniBand 0x06
123 #define tePciSc_Ipmi 0x07
124 #define tePciSc_SercosInterfaceStandard 0x08
125 #define tePciSc_CanBus 0x09
126 
127 #define tePciBc_WirelessController 0x0d
128 #define tePciSc_IrdaCompatibleController 0x00
129 #define tePciSc_ConsumerIrController 0x01
130 #define tePciSc_RfController 0x10
131 #define tePciSc_BluetoothController 0x11
132 #define tePciSc_BroadbandController 0x12
133 #define tePciSc_Ethernet802_11aController 0x20
134 #define tePciSc_Ethernet802_11bController 0x20
135 #define tePciSc_OtherWirelessController 0x80
136 
137 #define tePciBc_IntellegentIoController 0x0e
138 
139 #define tePciBc_SatelliteCommunicationController 0x0f
140 #define tePciSc_Tv 0x01
141 #define tePciSc_Audio 0x02
142 #define tePciSc_Voice 0x03
143 #define tePciSc_Data 0x04
144 
145 #define tePciBc_EncryptionDecryptionController 0x10
146 #define tePciSc_NetworkAndComputingCrypto 0x00
147 #define tePciSc_EntertainmentCrypto 0x10
148 #define tePciSc_OtherCrypto 0x80
149 
150 #define tePciBc_DataAcquisitionAndSignalProcessingController 0x11
151 #define tePciSc_DpioModules 0x00
152 #define tePciSc_PerformanceCounters 0x01
153 #define tePciSc_CommSyncPlusTimeAndFreq 0x10
154 #define tePciSc_ManagementCard 0x20
155 #define tePciSc_OtherDataAcquisitionSignalProcessingController 0x80
156 
157 #define tePciBc_Unknown 0xff
158 
159 #define tePciBc_EncryptionDecryptionController 0x10
160 
161 #endif // TEMU_PCI_DEFINE_H