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| void(* | reset )(void *Cpu, int ResetType) |
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| temu_CpuExitReason(* | run )(void *Cpu, uint64_t Cycles) |
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| temu_CpuExitReason(* | runUntil )(void *Cpu, uint64_t Cycles) |
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| temu_CpuExitReason(* | step )(void *Cpu, uint64_t Steps) |
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| temu_CpuExitReason(* | stepUntil )(void *Cpu, uint64_t Steps, uint64_t Cycles) |
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| void int | Trap |
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| void(* | enterIdleMode )(void *Obj) |
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| void temu_CpuExitReason | Reason |
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| uint64_t(* | getFreq )(void *Cpu) |
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| int64_t(* | getCycles )(void *Cpu) |
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| int64_t(* | getSteps )(void *Cpu) |
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| temu_CpuState(* | getState )(void *Cpu) |
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| void(* | setPc )(void *Cpu, uint64_t Pc) |
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| uint64_t(* | getPc )(void *Cpu) |
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| void(* | setGpr )(void *Cpu, int Reg, uint64_t Value) |
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| uint64_t(* | getGpr )(void *Cpu, unsigned Reg) |
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| void(* | setFpr32 )(void *Cpu, unsigned Reg, uint32_t Value) |
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| uint32_t(* | getFpr32 )(void *Cpu, unsigned Reg) |
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| void(* | setFpr64 )(void *Cpu, unsigned Reg, uint64_t Value) |
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| uint64_t(* | getFpr64 )(void *Cpu, unsigned Reg) |
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| void(* | setSpr )(void *Cpu, unsigned Reg, uint64_t Value) |
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| uint64_t(* | getSpr )(void *Cpu, unsigned Reg) |
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| int(* | getRegId )(void *Cpu, const char *RegName) |
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| const char *(* | getRegName )(void *Cpu, int RegId) |
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| uint32_t(* | assemble )(void *Cpu, const char *AsmStr) |
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| char *(* | disassemble )(void *Cpu, uint32_t Instr) |
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| void(* | enableTraps )(void *Cpu) |
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| void(* | disableTraps )(void *Cpu) |
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| void(* | invalidateAtc )(void *Obj, uint64_t Addr, uint64_t Pages, uint32_t Flags) |
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| uint64_t(* | translateAddress )(void *Cpu, uint64_t Va, uint32_t *Flags) |
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| temu_PowerState(* | getPowerState )(void *Cpu) |
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| void(* | setPowerState )(void *Cpu, temu_PowerState Ps) |
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| void(* | enableTrapEvents )(void *Cpu) |
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| void(* | disableTrapEvents )(void *Cpu) |
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| void(* | enableErrorModeEvents )(void *Cpu) |
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| void(* | disableErrorModeEvents )(void *Cpu) |
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Common CPU interface.
The CPU interface provides common functionality that all processors must implement. This includes the reset and run methods. But also different register access functions. The register access functions are functions, because registers may be banked and we want some type of common interface that can access the current registers. Note that the interface currently only support 32 bit processors.
- Warning
- Some functions will not return and execute longjmps to the emulation loop instead. These functions should NOT be called from any C++ code that needs destructors to be called on exit or from any events handlers.
reset The function executing a reset. It takes as parameter the reset type, which is 0 for a default cold reset.
run Run the main emulator loop for a given number of cycles.
runUntil Run the main emulator loop until its cycle counter reach the end cycles.
step Run the given number of steps. A step is one instruction, completed or not. E.g. a trapping instruction does not complete but is counted as a step.
stepUntil Step the emulator, but stop if the step exceeds a certain fixed time.
raiseTrap Raises a trap on the CPU. THIS FUNCTION DOES NOT RETURN!!!
- Warning
- The raiseTrap function will normally be constructed using longjmp, that implies that you should not call this from a model which must properly unwind the stack and call destructors on the way.
enterIdleMode Will call longjmp and enter idle mode immediately, this is useful for devices that activates power down mode.
- Warning
- This function does not return and destructors will not be called when the stack is unwound.
exitEmuCore Will call longjmp to exit the emulator core. This can be used in certain cases where the other exit functions do not suite well. One being that a reset is called from an MMIO write or read, or from a watchdog event. The reset can otherwise be called when the emulator is not running, so in a model you can call reset and then exitEmuCore.
getGpr Read the currently visible general purpose registers. For banked registers (e.g. SPARC reg windows), you should look at the arch specific interface instead.
getFpr32 Read the currently visible floating point registers.
setSpr Set special purpose registers. The indexes have been explicitly choosen to be equal to what is assumed by the GDB protocol, but re-based at zero.
getSpr Read special purpose registers. The indexes have been explicitly choosen to be equal to what is assumed by GDB but rebased at zero.
disassemble This function will disassemble an instruction. The function returns a heap-allocated string (allocated with malloc()). The caller is responsible for calling free() and managing the lifetime.
invalidateAtc Invalidates the ATC cache for the given address range. Flags can be set to control the invalidation. Bit 0: don't invalidate fetch. Bit 1: don't Invalidate read, bit 2: don't invalidate write, bit 3 don't invalidate user, bit 4 don't invalidate super.
translateAddress Does a table walk and translates the virtual address to physical page address. For MMU free systems, the function returns the Va masked with ~(page size-1). Otherwise, the return is the translated page address and in the case of failure -1.
Definition at line 137 of file Cpu.h.
1.8.8
