A high performance micro-processor emulator. Created by Terma.


TEMU is an advanced micro processor emulator, currently targeted at emulating common processors and devices used in European spacecraft. The emulator is fully capable of emulating multi-core processors.

Based on the LLVM framework TEMU is a high performance emulator (currently providing 250 MIPS on a 3.5GHz PC when running Dhrystone). Currently supported instruction set architectures include the SPARCv8 (with some extensions used in the supported processors), ARMv7-R and PowerPC. Other architectures can be made available if requested.

The following processors are available in TEMU:

  • ERC32 and MEC device models
  • LEON2 with on-chip devices
  • LEON3 and LEON4 with fundamental GRLIB devices
  • TMS570 with a subset of on chip device models
  • PPC750
  • E500 with most P2020 peripherals

Note that the emulator is not limited to the mentioned processors and device models. The emulator is very flexible. Additional CPU cores can be added if requested and additional device models can be implemented by the emulator user, or by Terma.


  • T-EMU Evolution: SESP 2015 paper slides
  • Emulator Performance Analysis: SESP 2015 paper poster
  • T-EMU: The Next Generation Micro-Processor Emulator: EuroLLVM April 13-14, 2015 slides
  • High Performance Microprocessor Emulation for Software Validation Facilities and Operational Simulators: SpaceOps 2016 paper slides