  | 
  
    TEMU
    4.4
    
   The Terma Emulator 
   | 
 
 
 
 
Go to the documentation of this file.
   12 #include "temu-c/Models/Power.h" 
   13 #include "temu-c/Support/Objsys.h" 
   44 #define TEMU_ATC_FETCH 1
 
   45 #define TEMU_ATC_READ (1 
<< 1
) 
   46 #define TEMU_ATC_WRITE (1 
<< 2
) 
   47 #define TEMU_ATC_USER (1 
<< 3
) 
   48 #define TEMU_ATC_SUPER (1 
<< 4
) 
   49 #define TEMU_ATC_HYPER (1 
<< 5
) 
  169   void (*
reset)(
void *Cpu, 
int ResetType);
 
  170   temu_CpuExitReason (*run)(
void *Cpu, uint64_t Cycles);
 
  171   temu_CpuExitReason (*runUntil)(
void *Cpu, uint64_t Cycles);
 
  172   temu_CpuExitReason (*step)(
void *Cpu, uint64_t Steps);
 
  173   temu_CpuExitReason (*stepUntil)(
void *Cpu, uint64_t Steps, uint64_t Cycles);
 
  180   uint64_t (*getFreq)(
void *Cpu);
 
  181   int64_t (*getCycles)(
void *Cpu);
 
  182   int64_t (*getSteps)(
void *Cpu);
 
  183   temu_CpuState (*getState)(
void *Cpu);
 
  184   void (*
setPc)(
void *Cpu, uint64_t Pc);
 
  185   uint64_t (*getPc)(
void *Cpu);
 
  186   void (*
setGpr)(
void *Cpu, 
int Reg, uint64_t Value);
 
  187   uint64_t (*getGpr)(
void *Cpu, 
unsigned Reg);
 
  188   void (*
setFpr32)(
void *Cpu, 
unsigned Reg, uint32_t Value);
 
  189   uint32_t (*getFpr32)(
void *Cpu, 
unsigned Reg);
 
  190   void (*
setFpr64)(
void *Cpu, 
unsigned Reg, uint64_t Value);
 
  191   uint64_t (*getFpr64)(
void *Cpu, 
unsigned Reg);
 
  192   void (*
setSpr)(
void *Cpu, 
unsigned Reg, uint64_t Value);
 
  193   uint64_t (*getSpr)(
void *Cpu, 
unsigned Reg);
 
  196   uint32_t (*assemble)(
void *Cpu, 
const char *AsmStr);
 
  203   uint64_t (*translateAddress)(
void *Cpu, uint64_t Va, uint32_t *Flags);
 
  219   const temu_CpuInfo *(*getCPUInfo)(
void *Cpu); 
 
  238   int64_t (*getIdleSteps)(
void *Cpu);
 
  239   int64_t (*getIdleCycles)(
void *Cpu);
 
  250   temu_CpuExitReason (*synchronizingRun)(
void *Obj, uint64_t Cycles);
 
  251   temu_CpuExitReason (*synchronizingRunUntil)(
void *Obj, uint64_t Cycles);
 
  252   temu_CpuExitReason (*synchronizingStep)(
void *Obj, uint64_t Steps);
 
  253   temu_CpuExitReason (*synchronizingStepUntil)(
void *Obj, uint64_t Steps, uint64_t Cycles);
 
  256 #define TEMU_CPU_IFACE_TYPE "temu::CpuIface" 
  257 TEMU_IFACE_REFERENCE_TYPE(temu_Cpu);
 
  263 } temu_TrapEventInfo;
 
  268 } temu_ModeSwitchInfo;
 
  276 #define TEMU_INSTR_BRANCH (1 
<< 0
) 
  277 #define TEMU_INSTR_INDIRECT_BRANCH (1 
<< 1
) 
  278 #define TEMU_INSTR_LOAD (1 
<< 2
) 
  279 #define TEMU_INSTR_STORE (1 
<< 3
) 
  280 #define TEMU_INSTR_INTEGER (1 
<< 4
) 
  281 #define TEMU_INSTR_FLOAT (1 
<< 5
) 
  282 #define TEMU_INSTR_ARITHMETIC (1 
<< 6
) 
  283 #define TEMU_INSTR_ANNULLED (1 
<< 7
) 
  284 #define TEMU_INSTR_UNCOND (1 
<< 8
) 
  285 #define TEMU_INSTR_UNCOND_NEVER (1 
<< 9
) 
  286 #define TEMU_INSTR_ON_PAGE (1 
<< 10
) 
  287 #define TEMU_INSTR_MODE_SWITCH (1 
<< 11
) 
  288 #define TEMU_INSTR_ILLEGAL (1 
<< 12
) 
  289 #define TEMU_INSTR_NO_DBT (1 
<< 13
) 
  292 #define TEMU_INSTR_UNIMP (1 
<< 14
) 
  304 } temu_TargetExecutionIface;
 
  305 #define TEMU_TARGET_EXEC_IFACE_TYPE "temu::TargetExecutionIface" 
  306 TEMU_IFACE_REFERENCE_TYPE(temu_TargetExecution);
 
  308 #define TEMU_STICKY_DO_NOT_EXIT_AT_HALT 1
 
  309 #define TEMU_STICKY_PROFILE_MODE 2
 
  312 #define TEMU_STICKY_DISABLE_IDLE (1 
<< 2
) 
  324   uint64_t (*getResetAddress)(
void *Obj);
 
  325 } temu_DynamicResetAddressIface;
 
  326 #define TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE "temu::DynamicResetAddressIface" 
  327 TEMU_IFACE_REFERENCE_TYPE(temu_DynamicResetAddress);
 
  349                                unsigned NumInstructions);
 
  357   int (*
chainBlocks)(
void *Obj, uint64_t SourceBlockPA, uint64_t TargetBlockPA,
 
  371   uint64_t (*getStatistics)(
void *Obj, temu_BTStatID ID);
 
  375 } temu_BinaryTranslationControlIface;
 
  376 #define TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE 
  377   "temu::BinaryTranslationControlIface" 
  378 TEMU_IFACE_REFERENCE_TYPE(temu_BinaryTranslationControl);
 
  
 
temu_Endian DataEndianess
Data endianness.
Definition: Cpu.h:77
 
void(* setPowerState)(void *Cpu, temu_PowerState Ps)
Definition: Cpu.h:206
 
void(* enterIdleMode)(void *Obj)
Definition: Cpu.h:176
 
@ teBTS_CodeSize
Translated code size in bytes.
Definition: Cpu.h:337
 
@ teCER_Early
Other early exit reason.
Definition: Cpu.h:38
 
@ teBTS_TranslatedInstructions
Number of translated instructions.
Definition: Cpu.h:333
 
@ teCER_Event
Definition: Cpu.h:33
 
void(* raiseTrapNoJmp)(void *Cpu, int Trap)
Definition: Cpu.h:215
 
uint64_t PC
Program counter when trap occurred.
Definition: Cpu.h:261
 
@ teCER_WatchW
Exited due to watchpoint write hit.
Definition: Cpu.h:37
 
void(* enableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:231
 
int(* chainBlocks)(void *Obj, uint64_t SourceBlockPA, uint64_t TargetBlockPA, int TakenArm)
Manually chain blocks.
Definition: Cpu.h:357
 
void(* enableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:211
 
void(* setFpr64)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:190
 
void int Trap
Definition: Cpu.h:175
 
void(* enableBinaryTranslator)(void *Obj)
Enable translator for processor.
Definition: Cpu.h:342
 
@ teCER_Break
Exited due to breakpoint hit.
Definition: Cpu.h:35
 
void(* forceEarlyExit)(void *Cpu)
Definition: Cpu.h:224
 
@ teBTS_ExecutedBlocks
Number of executed blocks.
Definition: Cpu.h:336
 
void(* disableProfiling)(void *Obj)
Definition: Cpu.h:235
 
char *(* disassemble)(void *Cpu, uint32_t Instr)
Definition: Cpu.h:197
 
unsigned NumInstructionSets
Number of instruction sets.
Definition: Cpu.h:79
 
void(* purgeDirtyPages)(void *Obj)
Definition: Cpu.h:244
 
@ teBTS_TranslatedBlocks
Number of translated blocks.
Definition: Cpu.h:335
 
void(* setSpr)(void *Cpu, unsigned Reg, uint64_t Value)
Definition: Cpu.h:192
 
@ teEN_Little
Always little endian.
Definition: Cpu.h:55
 
const char * ArchName
Architecture name.
Definition: Cpu.h:64
 
void(* setPc)(void *Cpu, uint64_t Pc)
Definition: Cpu.h:184
 
int(* translateBlock)(void *Obj, uint64_t VA, uint64_t PA)
Definition: Cpu.h:352
 
@ teCER_Trap
Exited due to trap (sync trap)
Definition: Cpu.h:31
 
void(* forceSpecificExit)(void *Cpu, temu_CpuExitReason reason)
Definition: Cpu.h:242
 
temu_Endian InstructionEndianess
Instruction endianness.
Definition: Cpu.h:76
 
temu_CpuState
Definition: Cpu.h:20
 
unsigned VASize
Virtual address size in bits.
Definition: Cpu.h:67
 
@ teCS_Nominal
Normal all ok CPU state.
Definition: Cpu.h:21
 
const char *(* getRegName)(void *Cpu, int RegId)
Definition: Cpu.h:195
 
void(* setThreshold)(void *Obj, unsigned Threshold)
Set threshold (of call target execution) for triggering translation.
Definition: Cpu.h:346
 
int(* clearBlocksOnPage)(void *Obj, uint64_t PA)
Remove all translated blocks on a specific physical page.
Definition: Cpu.h:365
 
int(* translateAddressWithRoot)(void *Cpu, uint64_t Va, uint32_t *Flags, uint64_t RootPointer, uint64_t *PA)
Definition: Cpu.h:247
 
const char *(* disassembleBlock)(void *Obj, uint64_t PA)
Disassemble block (using the host assembler)
Definition: Cpu.h:360
 
void(* enterHaltedMode)(void *Obj)
Definition: Cpu.h:240
 
int(* translateFunc)(void *Obj, uint64_t VA, uint64_t PA)
Definition: Cpu.h:355
 
const char *(* getTrapName)(void *Cpu, int Trap)
Definition: Cpu.h:217
 
void(* enableStatistics)(void *Obj, temu_BTStatID ID)
Enable collection of statistic in translated code.
Definition: Cpu.h:367
 
void(* disableModeSwitchEvents)(void *Obj)
Definition: Cpu.h:232
 
void(* enableTrapEvents)(void *Cpu)
Definition: Cpu.h:208
 
void temu_CpuExitReason Reason
Definition: Cpu.h:178
 
int(* getRegId)(void *Cpu, const char *RegName)
Definition: Cpu.h:194
 
@ teEN_Big
Always big endian.
Definition: Cpu.h:56
 
unsigned FPRCount
FPR register count.
Definition: Cpu.h:74
 
int(* clearBlock)(void *Obj, uint64_t PA)
Remove a specific block and unlink incoming/outgoing chains.
Definition: Cpu.h:363
 
int(* translateInstructions)(void *Obj, uint64_t VA, uint64_t PA, unsigned NumInstructions)
Translate specific instruction range.
Definition: Cpu.h:348
 
unsigned PASize
Physical address size in bits.
Definition: Cpu.h:68
 
void(* clearStatistics)(void *Obj, temu_BTStatID ID)
Reset statistics.
Definition: Cpu.h:373
 
temu_CpuExitReason
Definition: Cpu.h:29
 
@ teCER_Sync
Instruction cache sync operation.
Definition: Cpu.h:40
 
void(* disableErrorModeEvents)(void *Cpu)
Definition: Cpu.h:212
 
uint64_t nPC
Only valid for targets with delay slots.
Definition: Cpu.h:262
 
void(* enableTraps)(void *Cpu)
Definition: Cpu.h:198
 
int ResetType
0 == cold, 1 == warm reset
Definition: Cpu.h:271
 
void *(* getRawRuntime)(void *Obj)
Internal usage.
Definition: Cpu.h:303
 
void(* profileCounterOverflow)(void *Obj, uint64_t VA)
Profile counter overflow handler.
Definition: Cpu.h:299
 
void(* invalidateFetchAtc)(void *Obj)
Definition: Cpu.h:245
 
void(* reset)(void *Cpu, int ResetType)
Definition: Cpu.h:169
 
temu_PowerState(* getPowerState)(void *Cpu)
Definition: Cpu.h:205
 
unsigned GPRCount
GPR register count.
Definition: Cpu.h:73
 
void(* enableProfiling)(void *Obj)
Definition: Cpu.h:234
 
uint32_t OldMode
Old processor privilege level.
Definition: Cpu.h:266
 
@ teCER_WatchR
Exited due to watchpoint read hit.
Definition: Cpu.h:36
 
uint32_t TrapId
Trap number (architecture specific)
Definition: Cpu.h:260
 
void(* setGpr)(void *Cpu, int Reg, uint64_t Value)
Definition: Cpu.h:186
 
@ teEN_Dynamic
Can switch at runtime.
Definition: Cpu.h:57
 
unsigned PATypeSize
Definition: Cpu.h:70
 
void(* disableTrapEvents)(void *Cpu)
Definition: Cpu.h:209
 
void(* disableBinaryTranslator)(void *Obj)
Disable translator for processor.
Definition: Cpu.h:344
 
void __attribute__((noreturn))(*exitEmuCore)(void *Cpu
 
void(* setResetAddress)(void *Obj, uint64_t Address)
Update reset address in processor.
Definition: Cpu.h:322
 
void *(* getMachine)(void *Cpu)
Definition: Cpu.h:214
 
void(* flushProfileCaches)(void *Obj)
Definition: Cpu.h:236
 
int(* wakeUp)(void *Cpu)
Definition: Cpu.h:221
 
void *(* translateIRAddress)(void *Obj, uint64_t Va)
Definition: Cpu.h:229
 
temu_Endian
< Endianness of target architecture
Definition: Cpu.h:54
 
uint32_t NewMode
New processor privilege level.
Definition: Cpu.h:267
 
@ teCER_Panic
Emulator panic (e.g. illegal mode transition)
Definition: Cpu.h:39
 
@ teBTS_ExecutedInstructions
Number of executed instructions.
Definition: Cpu.h:334
 
const char * ModelName
Processor model name.
Definition: Cpu.h:65
 
void(* setFpr32)(void *Cpu, unsigned Reg, uint32_t Value)
Definition: Cpu.h:188
 
void(* invalidateAtc)(void *Obj, uint64_t Addr, uint64_t Pages, uint32_t Flags)
Definition: Cpu.h:200
 
unsigned VATypeSize
Virtual address type size in bytes.
Definition: Cpu.h:69
 
@ teCER_Normal
Normal exit (cannot be passed to early exit)
Definition: Cpu.h:30
 
@ teCS_Idling
Definition: Cpu.h:24
 
void(* disableStatistics)(void *Obj, temu_BTStatID ID)
Disable collection of statistic in translated code.
Definition: Cpu.h:369
 
@ teCS_Halted
Definition: Cpu.h:22
 
void(* disableTraps)(void *Cpu)
Definition: Cpu.h:199
 
void __attribute__((noreturn))(*raiseTrap)(void *Obj
 
void(* wrotePage)(void *Obj, uint64_t Va, uint64_t Pa)
Page written (for flushing caches)
Definition: Cpu.h:301
 
@ teCER_Halt
Exited due to halting (e.g. sparc error mode)
Definition: Cpu.h:32