Cpu.h File Reference

#include "temu-c/Models/Power.h"
#include "temu-c/Support/Objsys.h"
#include <stdint.h>

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Data Structures
struct	temu_CpuInfo
struct	temu_CpuIface
struct	temu_TrapEventInfo
struct	temu_ModeSwitchInfo
struct	temu_ResetInfo
struct	temu_TargetExecutionIface
struct	temu_DynamicResetAddressIface
struct	temu_BinaryTranslationControlIface

Macros
#define	TEMU_ATC_FETCH   1
#define	TEMU_ATC_READ   (1 << 1)
#define	TEMU_ATC_WRITE   (1 << 2)
#define	TEMU_ATC_USER   (1 << 3)
#define	TEMU_ATC_SUPER   (1 << 4)
#define	TEMU_ATC_HYPER   (1 << 5)
#define	TEMU_CPU_IFACE_TYPE   "temu::CpuIface"
#define	TEMU_INSTR_BRANCH   (1 << 0)
#define	TEMU_INSTR_INDIRECT_BRANCH   (1 << 1)
#define	TEMU_INSTR_LOAD   (1 << 2)
#define	TEMU_INSTR_STORE   (1 << 3)
#define	TEMU_INSTR_INTEGER   (1 << 4)
#define	TEMU_INSTR_FLOAT   (1 << 5)
#define	TEMU_INSTR_ARITHMETIC   (1 << 6)
#define	TEMU_INSTR_ANNULLED   (1 << 7)
#define	TEMU_INSTR_UNCOND   (1 << 8)
#define	TEMU_INSTR_UNCOND_NEVER   (1 << 9)
#define	TEMU_INSTR_ON_PAGE   (1 << 10)
#define	TEMU_INSTR_MODE_SWITCH   (1 << 11)
#define	TEMU_INSTR_ILLEGAL   (1 << 12)
#define	TEMU_INSTR_NO_DBT   (1 << 13)
#define	TEMU_INSTR_UNIMP   (1 << 14)
#define	TEMU_TARGET_EXEC_IFACE_TYPE   "temu::TargetExecutionIface"
#define	TEMU_STICKY_DO_NOT_EXIT_AT_HALT   1
#define	TEMU_STICKY_PROFILE_MODE   2
#define	TEMU_STICKY_DISABLE_IDLE   (1 << 2)
#define	TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE   "temu::DynamicResetAddressIface"
#define	TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE   "temu::BinaryTranslationControlIface"

Typedefs
typedef enum temu_CpuState	temu_CpuState
typedef enum temu_CpuExitReason	temu_CpuExitReason
typedef enum temu_Endian	temu_Endian
	< Endianness of target architecture More...
typedef struct temu_CpuIface	temu_CpuIface

Enumerations
enum	temu_CpuState { teCS_Nominal, teCS_Halted, teCS_Idling }
enum	temu_CpuExitReason {   teCER_Normal = 0, teCER_Trap = 2, teCER_Halt, teCER_Event,   teCER_Break, teCER_WatchR, teCER_WatchW, teCER_Early,   teCER_Panic, teCER_Sync }
enum	temu_Endian { teEN_Little, teEN_Big, teEN_Dynamic }
	< Endianness of target architecture More...
enum	temu_BTStatID {   teBTS_TranslatedInstructions, teBTS_ExecutedInstructions, teBTS_TranslatedBlocks, teBTS_ExecutedBlocks,   teBTS_CodeSize }

Functions
	TEMU_IFACE_REFERENCE_TYPE (temu_Cpu)
	TEMU_IFACE_REFERENCE_TYPE (temu_TargetExecution)
	TEMU_IFACE_REFERENCE_TYPE (temu_DynamicResetAddress)
	TEMU_IFACE_REFERENCE_TYPE (temu_BinaryTranslationControl)

Macro Definition Documentation

TEMU_ATC_FETCH

#define TEMU_ATC_FETCH   1

TEMU_ATC_HYPER

#define TEMU_ATC_HYPER   (1 << 5)

TEMU_ATC_READ

#define TEMU_ATC_READ   (1 << 1)

TEMU_ATC_SUPER

#define TEMU_ATC_SUPER   (1 << 4)

TEMU_ATC_USER

#define TEMU_ATC_USER   (1 << 3)

TEMU_ATC_WRITE

#define TEMU_ATC_WRITE   (1 << 2)

TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE

#define TEMU_BINARY_TRANSLATION_CONTROL_IFACE_TYPE   "temu::BinaryTranslationControlIface"

TEMU_CPU_IFACE_TYPE

#define TEMU_CPU_IFACE_TYPE   "temu::CpuIface"

TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE

#define TEMU_DYNAMIC_RESET_ADDRESS_IFACE_TYPE   "temu::DynamicResetAddressIface"

TEMU_INSTR_ANNULLED

#define TEMU_INSTR_ANNULLED   (1 << 7)

TEMU_INSTR_ARITHMETIC

#define TEMU_INSTR_ARITHMETIC   (1 << 6)

TEMU_INSTR_BRANCH

#define TEMU_INSTR_BRANCH   (1 << 0)

TEMU_INSTR_FLOAT

#define TEMU_INSTR_FLOAT   (1 << 5)

TEMU_INSTR_ILLEGAL

#define TEMU_INSTR_ILLEGAL   (1 << 12)

TEMU_INSTR_INDIRECT_BRANCH

#define TEMU_INSTR_INDIRECT_BRANCH   (1 << 1)

TEMU_INSTR_INTEGER

#define TEMU_INSTR_INTEGER   (1 << 4)

TEMU_INSTR_LOAD

#define TEMU_INSTR_LOAD   (1 << 2)

TEMU_INSTR_MODE_SWITCH

#define TEMU_INSTR_MODE_SWITCH   (1 << 11)

TEMU_INSTR_NO_DBT

#define TEMU_INSTR_NO_DBT   (1 << 13)

TEMU_INSTR_ON_PAGE

#define TEMU_INSTR_ON_PAGE   (1 << 10)

TEMU_INSTR_STORE

#define TEMU_INSTR_STORE   (1 << 3)

TEMU_INSTR_UNCOND

#define TEMU_INSTR_UNCOND   (1 << 8)

TEMU_INSTR_UNCOND_NEVER

#define TEMU_INSTR_UNCOND_NEVER   (1 << 9)

TEMU_INSTR_UNIMP

#define TEMU_INSTR_UNIMP   (1 << 14)

TEMU_STICKY_DISABLE_IDLE

#define TEMU_STICKY_DISABLE_IDLE   (1 << 2)

TEMU_STICKY_DO_NOT_EXIT_AT_HALT

#define TEMU_STICKY_DO_NOT_EXIT_AT_HALT   1

TEMU_STICKY_PROFILE_MODE

#define TEMU_STICKY_PROFILE_MODE   2

TEMU_TARGET_EXEC_IFACE_TYPE

#define TEMU_TARGET_EXEC_IFACE_TYPE   "temu::TargetExecutionIface"

Typedef Documentation

temu_CpuExitReason

typedef enum temu_CpuExitReason temu_CpuExitReason

temu_CpuIface

typedef struct temu_CpuIface temu_CpuIface

Common CPU interface.

The CPU interface provides common functionality that all processors must implement. This includes the reset and run methods. But also different register access functions. The register access functions are functions, because registers may be banked and we want some type of common interface that can access the current registers. Note that the interface currently only support 32 bit processors.

Warning

Some functions will not return and execute longjmps to the emulation loop instead. These functions should NOT be called from any C++ code that needs destructors to be called on exit or from any events handlers.

\field reset The function executing a reset. It takes as parameter the reset type, which is 0 for a default cold reset.

\field run Run the main emulator loop for a given number of cycles.

\field runUntil Run the main emulator loop until its cycle counter reach the end cycles.

\field step Run the given number of steps. A step is one instruction, completed or not. E.g. a trapping instruction does not complete but is counted as a step.

\field stepUntil Step the emulator, but stop if the step exceeds a certain fixed time.

\field raiseTrap Raises a trap on the CPU. THIS FUNCTION DOES NOT RETURN!!!

Warning

The raiseTrap function will normally be constructed using longjmp, that implies that you should not call this from a model which must properly unwind the stack and call destructors on the way.

\field enterIdleMode Will call longjmp and enter idle mode immediately, this is useful for devices that activates power down mode.

Warning

This function does not return and destructors will not be called when the stack is unwound.

\field exitEmuCore Will call longjmp to exit the emulator core. This can be used in certain cases where the other exit functions do not suite well. One being that a reset is called from an MMIO write or read, or from a watchdog event. The reset can otherwise be called when the emulator is not running, so in a model you can call reset and then exitEmuCore.

\field getGpr Read the currently visible general purpose registers. For banked registers (e.g. SPARC reg windows), you should look at the arch specific interface instead.

\field getFpr32 Read the currently visible floating point registers.

\field setSpr Set special purpose registers. The indexes have been explicitly choosen to be equal to what is assumed by the GDB protocol, but re-based at zero.

\field getSpr Read special purpose registers. The indexes have been explicitly choosen to be equal to what is assumed by GDB but rebased at zero.

\field disassemble This function will disassemble an instruction. The function returns a heap-allocated string (allocated with malloc()). The caller is responsible for calling free() and managing the lifetime.

\field invalidateAtc Invalidates the ATC cache for the given address range. Flags can be set to control the invalidation. Bit 0: don't invalidate fetch. Bit 1: don't Invalidate read, bit 2: don't invalidate write, bit 3 don't invalidate user, bit 4 don't invalidate super.

\field translateAddress Does a table walk and translates the virtual address to physical page address. For MMU free systems, the function returns the Va masked with ~(page size-1). Otherwise, the return is the translated page address and in the case of failure -1.

\field raiseTrapNoJmp Raises a trap without longjmp to emulator core main loop. This can be used in e.g. timed event handlers and when the core isn't running.

temu_CpuState

typedef enum temu_CpuState temu_CpuState

temu_Endian

typedef enum temu_Endian temu_Endian

< Endianness of target architecture

Enumeration Type Documentation

temu_BTStatID

enum temu_BTStatID

Statistics ID for controlling collection of individual statistics.

Enumerator
teBTS_TranslatedInstructions	Number of translated instructions.
teBTS_ExecutedInstructions	Number of executed instructions.
teBTS_TranslatedBlocks	Number of translated blocks.
teBTS_ExecutedBlocks	Number of executed blocks.
teBTS_CodeSize	Translated code size in bytes.

temu_CpuExitReason

enum temu_CpuExitReason

Enumerator
teCER_Normal	Normal exit (cannot be passed to early exit)
teCER_Trap	Exited due to trap (sync trap)
teCER_Halt	Exited due to halting (e.g. sparc error mode)
teCER_Event	Exited due to synchronised event (internally, returned for any event)
teCER_Break	Exited due to breakpoint hit.
teCER_WatchR	Exited due to watchpoint read hit.
teCER_WatchW	Exited due to watchpoint write hit.
teCER_Early	Other early exit reason.
teCER_Panic	Emulator panic (e.g. illegal mode transition)
teCER_Sync	Instruction cache sync operation.

temu_CpuState

enum temu_CpuState

Enumerator
teCS_Nominal	Normal all ok CPU state.
teCS_Halted	Halted CPU (e.g. SPARC error mode), the CPU can go to the normal state using a reset
teCS_Idling	The CPU is in idle mode. It will not run instructions, only advance the CPUs event queue (until the CPU moves to another mode).

temu_Endian

enum temu_Endian

< Endianness of target architecture

Enumerator
teEN_Little	Always little endian.
teEN_Big	Always big endian.
teEN_Dynamic	Can switch at runtime.

Function Documentation

TEMU_IFACE_REFERENCE_TYPE() [1/4]

TEMU_IFACE_REFERENCE_TYPE

(

temu_BinaryTranslationControl

)

TEMU_IFACE_REFERENCE_TYPE() [2/4]

TEMU_IFACE_REFERENCE_TYPE

(

temu_Cpu

)

TEMU_IFACE_REFERENCE_TYPE() [3/4]

TEMU_IFACE_REFERENCE_TYPE

(

temu_DynamicResetAddress

)

TEMU_IFACE_REFERENCE_TYPE() [4/4]

TEMU_IFACE_REFERENCE_TYPE

(

temu_TargetExecution

)