P2020 DUART Model

This section describes the P2020 serial port (DUART) model. The DUART model supports both FIFO simualtion and infinite speed UARTs. In infinite speed mode bytes are sent directly when they are written to the data register. FIFO mode for both transmitter and receiver provides 16-byte FIFOs.

Loading the Plugin

import P2020

Configuration

config.infiniteUartSpeed

Enable/disable immediate UART.

config.fifoSize

maximum UART FIFO size.

config.clockDivider

Clock devider (default 1).

To receive transmitted data from DUART device can be connected via the serial interface it implements:

Connecting via Command Line
# Connect DUART transmitter to device model
connect a=duart.tx b=mydevice:SerialIface
Connecting via API
// Connect DUART transmitter to device model
temu_connect(duart, "tx", mydevice, "SerialIface");

The DUART programmable registers that occupy memory-mapped space are named according to P2020 QorIQ integrated processor reference manual. All the DUART registers are one-byte wide.

To enables the transmitter and receiver FIFOs you need to set FIFO Control Register value as follows:

Setting registers via Command Line
duart.UFCR = 0x01;
Setting registers via API
temu_writeValueU8(duart, "UFCR", 0x01, 0);

@DUART Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @DUART

new

Create new instance of DUART

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

DUART Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

UAFR

uint8_t

UART AlternateFunction register.

UDLB

uint8_t

UART DivisorLeastSignificantByte register.

UDMB

uint8_t

UART DivisorMostSignificantByte register.

UDSR

uint8_t

DUART DmaStatus register

UFCR

uint8_t

UART FifoControl register.

UIER

uint8_t

UART InterruptEnable register.

UIIR

uint8_t

UART InterruptId register.

ULCR

uint8_t

UART LineControl register.

ULSR

uint8_t

DUART LineStatus register.

UMCR

uint8_t

UART ModemControl register.

UMSR

uint8_t

DUART ModemStatus register.

URBR

uint8_t

UART ReceiverBuffer register.

USCR

uint8_t

DUART Scratch register

UTHR

uint8_t

UART TransmitterHolding register.

config.clockDivider

uint32_t

Clock divider

config.fifoSize

uint8_t

UART FIFO size

config.infiniteUartSpeed

uint8_t

Set to 1 to enable immediate UARTs

config.interrupt

uint8_t

Interrupt number

irqCtrl

temu_IfaceRef/ <unknown>

Interrupt controller

rxFifo.data

[uint8_t; 32]

RX FIFO data

rxFifo.size

uint8_t

RX size

rxFifo.start

uint8_t

RX start index

rxFifo.usage

uint8_t

RX usage

tx

temu_IfaceRef/ <unknown>

Transmit target

txFifo.data

[uint8_t; 32]

TX FIFO data

txFifo.size

uint8_t

TX size

txFifo.start

uint8_t

TX start index

txFifo.usage

uint8_t

TX usage

txShift

uint8_t

UART shift register

Interfaces

Name Type Description

DeviceIface

DeviceIface

Device interface.

MemAccessIface

MemAccessIface

Memory access interface.

ResetIface

ResetIface

Reset interface.

UartIface

SerialIface

Serial input interface.

Ports

Prop Iface Description

tx

UartIface

serial port

Commands

Name Description

delete

Dispose instance of DUART

Limitations

  • Control flow (cts and rts) is not supported.

  • Loop back mode is not supported.