Configuration

Interrupt Delivery

Set the irqControl property to point out the processor’s irq interface. The model will deliver normal SPARC interrupts (1 up to 15). The LEON2 also exports the IrqCtrlIface as IrqIface. IrqClientIface should be wired from the CPU the LEON2 model is connected to.

The IrqIface enables the use of external interrupts using the raise and lower functions. The LEON2 has 8 external IRQs mapped according to the following table (the mappings cannot be customised at present):

Table 1. External to Internal IRQ Mapping
External Internal (Sparc IRL)

0

4

1

5

2

6

3

7

4

10

5

12

6

13

7

15

The rules for IRQ raising is controlled by the GPIO IRQ config registers (it is also possible to raise IRQs by setting and lowering GPIO pins).

UART Connections

The UARTs are connected to the destination using the uarta and uartb properties. For the remote end points, these should be connected to UartAIface and UartBIface.

Infinite UART Speed

The UARTs can run either at infinite speed, or at simulated real-time speed. This can be configured using the infiniteUartSpeed property. Set this property to non-zero to enable infinite UART speed.

Note that this controls the speed of both UARTs.

When infinite speed is enabled, bytes are emitted to the destination serial device as soon as they have been written by the OBSW.

GPIO

The GPIO support in the LEON2 model supports interrupt generation using the GPIO interface instead of the IRQ controller interface. Model implements both the GpioClientIface and a property with a GpioBusIface reference (called gpioBus). The GPIO bus connection is not mandatory to set. If it is set, writes to the GPIO data register’s out bits will be forwarded over the GPIO port. Note that the LEON2 only have 16 GPIO pins.

Both the legacy multipin GpioBusIface and the new single pin SignalIface are supported. The model will prioritise the legacy interface for backwards compatibility. If you wish to use the SignalIface interface you should not set the gpioBus property.

Caches

The LEON2 SoC can act as a cache controller. That means that a cache model can notify the SoC about when it starts an evict/flush operation. The controller will also notify any connected caches about enabling, disabling and freezing events happening.

The cache parameters in the cache control register and the product configuration register are set automatically when connecting the dCache and iCache interface references to conforming objects.

When connecting the cache references, make sure the caches are configured before they are connected.

The caches that these interface references are connected to should normally be compliant with the supported LEON2 cache parameters. That is, there is a limitation on the sizes, lines and ways.

While the model does a best effort in trying to report errors when a miss-configured cache model is supplied, take care to ensure that the model is correctly configured.

@Leon2SoC Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @Leon2SoC

new

Create new instance of Leon2SoC

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

Leon2SoC Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

ahbfailaddr

uint32_t

Fail address register

ahbstat

uint32_t

Fail status register

behaviour

uint8_t

Set to 1 for COLE mode

cachectrl

uint32_t

Cache control register

config.levelMask

uint32_t

Level triggered internal interrupts (mask)

config.logInterrupts

uint8_t

Enable interrupt logging

cpu

temu_IfaceRef/ <unknown>

CPU to control with powerdown

dCache

temu_IfaceRef/ <unknown>

Data cache (optional)

gpioBus

temu_IfaceRef/ <unknown>

GPIO bus (deprecated, use signal interface instead)

gpioIrqLevel

uint32_t

gpioIrqMask

uint32_t

gpioIrqPolarity

uint32_t

gpiodir

uint32_t

I/O port direction register

gpioinout

uint32_t

I/O port data register

gpioirqcfg

uint32_t

I/O port interrupt register 1

gpioirqcfg2

uint32_t

I/O port interrupt register 2

iCache

temu_IfaceRef/ <unknown>

Instruction cache (optional)

infiniteUartSpeed

uint32_t

inputBits

uint32_t

Input signals

irqControl

temu_IfaceRef/ <unknown>

Next level IRQ controller object (e.g. CPU)

irqclear

uint32_t

Interrupt clear register

irqforce

uint32_t

Interrupt force register

irqmask

uint32_t

Interrupt mask and priority register

irqpend

uint32_t

Interrupt pending register

leoncfg

uint32_t

Product configuration register

memcfg1

uint32_t

Memory configration register 1

memcfg2

uint32_t

Memory configuration register 2

memcfg3

uint32_t

Memory configuration register 3

memcfg4

uint32_t

Memory configuration 4 (COLE)

memcfg5

uint32_t

Memory configuration 5 (COLE)

mr

uint32_t

Map register (COLE)

outSignals

[temu_IfaceRef; 16]/ <unknown>

Outgoing GPIO signals

powerdown

uint32_t

Idle register

presccntr

uint32_t

Prescaler counter register

prescrld

uint32_t

Prescaler reload register

timer1cntr

uint32_t

Timer 1 counter register

timer1ctrl

uint32_t

Timer 1 control register

timer1rld

uint32_t

Timer 1 reload register

timer2cntr

uint32_t

Timer 2 counter register

timer2ctrl

uint32_t

Timer 2 control register

timer2rld

uint32_t

Timer 2 reload register

uart1DatTxHold

uint32_t

UART1 data TX hold register

uart1DatTxShift

uint32_t

UART 1 data TX shift

uart1ctrl

uint32_t

UART 1 control register

uart1datrx

uint32_t

UART 1 RX data register

uart1scal

uint32_t

UART 1 scaler register

uart1stat

uint32_t

UART 1 status register

uart2DatTxHold

uint32_t

uart2DatTxShift

uint32_t

uart2ctrl

uint32_t

UART 2 control register

uart2datrx

uint32_t

UART 1 RX data register

uart2scal

uint32_t

UART 2 scaler register

uart2stat

uint32_t

UART 2 status register

uarta

temu_IfaceRef/ <unknown>

Serial port A

uartb

temu_IfaceRef/ <unknown>

Serial port B

watchdog

uint32_t

Watchdog register

writeprot1

uint32_t

Write protection register 1

writeprot2

uint32_t

Write protection register 2

writeprotstart1

uint32_t

Write protection start address 1

writeprotstart2

uint32_t

Write protection start address 2

writeprotstop1

uint32_t

Write protection end address 1

writeprotstop2

uint32_t

Write protection end address 2

Interfaces

Name Type Description

DCacheCtrlIface

CacheCtrlIface

D-cache to control

DeviceIface

DeviceIface

GpioClientIface

GpioClientIface

ICacheCtrlIface

CacheCtrlIface

I-cache to control

InternalIrqIface

IrqCtrlIface

Internal IRQ controller (native LEON numbering), post your IRQs here.

IrqClientIface

IrqClientIface

IRQ acknowledgement (from CPU)

IrqIface

IrqCtrlIface

External IRQ controller, post your IRQs here.

MemAccessIface

MemAccessIface

ResetIface

ResetIface

SignalIface

SignalIface

Incomming signals

UartAIface

SerialIface

UART A

UartBIface

SerialIface

UART B

Ports

Prop Iface Description

irqControl

IrqClientIface

Interrupt

uarta

UartAIface

uart a

uartb

UartBIface

uart b

Registers

Register support is currently experimental!

Register Bank registers

Register ahbfailaddr
Description

Fail address register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register ahbstat
Description

Fail status register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

eed

0x00000200

0x0

EDAC-correctable error detected

hed

0x00000100

0x0

Hardware error detected

het

0x00000080

0x0

Hardware error type

hem

0x00000078

0x0

Hardware error module

hes

0x00000007

0x0

Hardware error size

Register cachectrl
Description

Cache control register

Reset value

0xfd178000

Warm reset mask

0x00f9c00f

Diagram
Field Mask Reset Description

drepl

0xc0000000

0x3

Data cache replacement policy

irepl

0x30000000

0x3

Instruction cache replacement policy

isets

0x0c000000

0x3

Instruction cache associativity

dsets

0x01000000

0x1

Data cache associativity

ds

0x00800000

0x0

Data cache snoop enable

fd

0x00400000

0x0

Flush data cache

fi

0x00200000

0x0

Flush instruction cache

cpc

0x00180000

0x2

Cache parity bits

cptb

0x00060000

0x3

Cache parity test bits

ib

0x00010000

0x1

Instruction burst fetch

ip

0x00008000

0x1

Instruction cache flush pending

dp

0x00004000

0x0

Data cache flush pending

ite

0x00003000

0x0

Instruction cache tag error counter

ide

0x00000c00

0x0

Instruction cache data error counter

dte

0x00000300

0x0

Data cache tag error counter

dde

0x000000c0

0x0

Data cache data error counter

df

0x00000020

0x0

Data cache freeze on interrupt

if

0x00000010

0x0

Instruction cache freeze on interrupt

dcs

0x0000000c

0x0

Data cache state

ics

0x00000003

0x0

Instruction cache state

Register gpiodir
Description

I/O port direction register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register gpioinout
Description

I/O port data register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register gpioirqcfg
Description

I/O port interrupt register 1

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register gpioirqcfg2
Description

I/O port interrupt register 2

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register irqclear
Description

Interrupt clear register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register irqforce
Description

Interrupt force register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register irqmask
Description

Interrupt mask and priority register

Reset value

0x00000000

Warm reset mask

0x0000fffe

Diagram
Field Mask Reset Description

ilevel_io7

0x80000000

0x0

Interrupt level

ilevel_pci

0x40000000

0x0

Interrupt level

ilevel_io6

0x20000000

0x0

Interrupt level

ilevel_io5

0x10000000

0x0

Interrupt level

ilevel_dsu

0x08000000

0x0

Interrupt level

ilevel_io4

0x04000000

0x0

Interrupt level

ilevel_timer2

0x02000000

0x0

Interrupt level

ilevel_timer1

0x01000000

0x0

Interrupt level

ilevel_io3

0x00800000

0x0

Interrupt level

ilevel_io2

0x00400000

0x0

Interrupt level

ilevel_io1

0x00200000

0x0

Interrupt level

ilevel_io0

0x00100000

0x0

Interrupt level

ilevel_uart1

0x00080000

0x0

Interrupt level

ilevel_uart2

0x00040000

0x0

Interrupt level

ilevel_amba

0x00020000

0x0

Interrupt level

imask_io7

0x00008000

0x0

Interrupt mask

imask_pci

0x00004000

0x0

Interrupt mask

imask_io6

0x00002000

0x0

Interrupt mask

imask_io5

0x00001000

0x0

Interrupt mask

imask_dsu

0x00000800

0x0

Interrupt mask

imask_io4

0x00000400

0x0

Interrupt mask

imask_timer2

0x00000200

0x0

Interrupt mask

imask_timer1

0x00000100

0x0

Interrupt mask

imask_io3

0x00000080

0x0

Interrupt mask

imask_io2

0x00000040

0x0

Interrupt mask

imask_io1

0x00000020

0x0

Interrupt mask

imask_io0

0x00000010

0x0

Interrupt mask

imask_uart1

0x00000008

0x0

Interrupt mask

imask_uart2

0x00000004

0x0

Interrupt mask

imask_amba

0x00000002

0x0

Interrupt mask

Register irqpend
Description

Interrupt pending register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register leoncfg
Description

Product configuration register

Reset value

0x7077bbd5

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

mmu

0x80000000

0x0

Memory management unit

dsu

0x40000000

0x1

Debug support unit

sdrctrl

0x20000000

0x1

SDRAM controller

wtpnb

0x1c000000

0x4

IU watchpoints

imac

0x02000000

0x0

UMAC/SMAC instructions

nwin

0x01f00000

0x7

IU register file windows

icsz

0x000e0000

0x3

Instruction cache set size

ilsz

0x00018000

0x3

Instruction cache line size

dcsz

0x00007000

0x3

Data cache set size

dlsz

0x00000c00

0x2

Data cache line size

divinst

0x00000200

0x1

UDIV/SDIV instructions

mulinst

0x00000100

0x1

UMUL/SMUL instructions

wdog

0x00000080

0x1

Watchdog

memstat

0x00000040

0x1

Memory status and address failing register

fpu

0x00000030

0x1

FPU type

pci

0x0000000c

0x1

PCI core type

wprt

0x00000003

0x1

Write protections

Register memcfg1
Description

Memory configration register 1

Reset value

0x00000000

Warm reset mask

0x7ef80bff

Diagram
Field Mask Reset Description

pbrdy

0x40000000

0x0

PROM area bus-ready enable

abrdy

0x20000000

0x0

Asynchronous bus ready

iowdh

0x18000000

0x0

I/O bus width

iobrdy

0x04000000

0x0

I/O area bus ready enable

bexc

0x02000000

0x0

Bus error enable for RAM PROM and I/O access

iows

0x00f00000

0x0

I/O waitstates

ioen

0x00080000

0x0

I/O area enable

prwen

0x00000800

0x0

PROM write enable

prwdh

0x00000300

0x0

PROM width

prwws

0x000000f0

0x0

PROM write waitstates

prrws

0x0000000f

0x0

PROM read waitstates

Register memcfg2
Description

Memory configuration register 2

Reset value

0x7c400020

Warm reset mask

0xfff86000

Diagram
Field Mask Reset Description

sdrref

0x80000000

0x0

SDRAM refresh

trp

0x40000000

0x1

SDRAM t_rp timing

trfc

0x38000000

0x7

SDRAM t_rfp timing

sdrcas

0x04000000

0x1

SDRAM CAS delay

sdrbs

0x03800000

0x0

SDRAM bank size

sdrcls

0x00600000

0x2

SDRAM column size

sdrcmd

0x00180000

0x0

SDRAM command

se

0x00004000

0x0

SDRAM enable

si

0x00002000

0x0

SDRAM disable

rambs

0x00001e00

0x0

SRAM bank size

rambrdy

0x00000080

0x0

SRAM area bus ready enable

ramrmw

0x00000040

0x0

SRAM read-modify-write

ramwdh

0x00000030

0x2

SRAM bus width

ramwws

0x0000000c

0x0

SRAM write waitstates

ramrws

0x00000003

0x0

SRAM read waitstates

Register memcfg3
Description

Memory configuration register 3

Reset value

0xc8000000

Warm reset mask

0xc8000c00

Diagram
Field Mask Reset Description

rfc

0xc0000000

0x3

Register file checkbits

me

0x08000000

0x1

Memory EDAC

srcrv

0x07fff000

0x0

SDRAM refresh counter reload value

wb

0x00000800

0x0

EDAC diagnostic write bypass

rb

0x00000400

0x0

EDAC diagnostic read

re

0x00000200

0x0

RAM EDAC enable

pe

0x00000100

0x0

PROM EDAC enable

tcb

0x000000ff

0x0

Test checkbits

Register powerdown
Description

Idle register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register presccntr
Description

Prescaler counter register

Reset value

0x00000000

Warm reset mask

0x000003ff

Diagram
Field Mask Reset Description

cnt

0x000003ff

0x0

Prescaler counter value

Register prescrld
Description

Prescaler reload register

Reset value

0x00000000

Warm reset mask

0x000003ff

Diagram
Field Mask Reset Description

rv

0x000003ff

0x0

Prescaler reload value

Register timer1cntr
Description

Timer 1 counter register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register timer1ctrl
Description

Timer 1 control register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

ld

0x00000004

0x0

Load counter

rl

0x00000002

0x0

Reload counter

en

0x00000001

0x0

Enable counter

Register timer1rld
Description

Timer 1 reload register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register timer2cntr
Description

Timer 2 counter register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register timer2ctrl
Description

Timer 2 control register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

ld

0x00000004

0x0

Load counter

rl

0x00000002

0x0

Reload counter

en

0x00000001

0x0

Enable counter

Register timer2rld
Description

Timer 2 reload register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register uart1ctrl
Description

UART 1 control register

Reset value

0x00000000

Warm reset mask

0x00000143

Diagram
Field Mask Reset Description

ec

0x00000100

0x0

External clock

lb

0x00000080

0x0

Loop back

fl

0x00000040

0x0

Flow control

pe

0x00000020

0x0

Parity enable

ps

0x00000010

0x0

Parity select

ti

0x00000008

0x0

Transmitter interrupt enable

ri

0x00000004

0x0

Receiver interrupt enable

te

0x00000002

0x0

Transmitter enable

re

0x00000001

0x0

Receiver enable

Register uart1datrx
Description

UART 1 RX data register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

rtd

0x000000ff

0x0

Received/transmit data

Register uart1scal
Description

UART 1 scaler register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register uart1stat
Description

UART 1 status register

Reset value

0x00000006

Warm reset mask

0x0000007f

Diagram
Field Mask Reset Description

fe

0x00000040

0x0

Framing error

pe

0x00000020

0x0

Parity error

ov

0x00000010

0x0

Overrun

br

0x00000008

0x0

Break received

th

0x00000004

0x1

Transmitter hold register empty

ts

0x00000002

0x1

Transmitter shift register empty

dr

0x00000001

0x0

Data ready

Register uart2ctrl
Description

UART 2 control register

Reset value

0x00000000

Warm reset mask

0x00000143

Diagram
Field Mask Reset Description

ec

0x00000100

0x0

External clock

lb

0x00000080

0x0

Loop back

fl

0x00000040

0x0

Flow control

pe

0x00000020

0x0

Parity enable

ps

0x00000010

0x0

Parity select

ti

0x00000008

0x0

Transmitter interrupt enable

ri

0x00000004

0x0

Receiver interrupt enable

te

0x00000002

0x0

Transmitter enable

re

0x00000001

0x0

Receiver enable

Register uart2datrx
Description

UART 1 RX data register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

rtd

0x000000ff

0x0

Received/transmit data

Register uart2scal
Description

UART 2 scaler register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register uart2stat
Description

UART 2 status register

Reset value

0x00000006

Warm reset mask

0x0000007f

Diagram
Field Mask Reset Description

fe

0x00000040

0x0

Framing error

pe

0x00000020

0x0

Parity error

ov

0x00000010

0x0

Overrun

br

0x00000008

0x0

Break received

th

0x00000004

0x1

Transmitter hold register empty

ts

0x00000002

0x1

Transmitter shift register empty

dr

0x00000001

0x0

Data ready

Register watchdog
Description

Watchdog register

Reset value

0x00000000

Warm reset mask

0x00000000

Field Mask Reset Description

-

-

-

-

Register writeprot1
Description

Write protection register 1

Reset value

0x00000000

Warm reset mask

0x80000000

Diagram
Field Mask Reset Description

en

0x80000000

0x0

Enable

bp

0x40000000

0x0

Block protect

tag

0x1fff8000

0x0

Address tag

mask

0x00003fff

0x0

Address mask

Register writeprot2
Description

Write protection register 2

Reset value

0x00000000

Warm reset mask

0x80000000

Diagram
Field Mask Reset Description

en

0x80000000

0x0

Enable

bp

0x40000000

0x0

Block protect

tag

0x1fff8000

0x0

Address tag

mask

0x00003fff

0x0

Address mask

Register writeprotstart1
Description

Write protection start address 1

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

start

0x3ffffffc

0x0

Start address

bp

0x00000002

0x0

Block protect

Register writeprotstart2
Description

Write protection start address 2

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

start

0x3ffffffc

0x0

Start address

bp

0x00000002

0x0

Block protect

Register writeprotstop1
Description

Write protection end address 1

Reset value

0x00000000

Warm reset mask

0x00000003

Diagram
Field Mask Reset Description

end

0x3ffffffc

0x0

End address

us

0x00000002

0x0

User mode

su

0x00000001

0x0

Supervisor mode

Register writeprotstop2
Description

Write protection end address 2

Reset value

0x00000000

Warm reset mask

0x00000003

Diagram
Field Mask Reset Description

end

0x3ffffffc

0x0

End address

us

0x00000002

0x0

User mode

su

0x00000001

0x0

Supervisor mode

Commands

Name Description

delete

Dispose instance of Leon2SoC

lowerInternalIrq

Lower internally numbered interrupts

raiseExternalIrq

Raise externally numbered interrupts

raiseInternalIrq

Raise internally numbered interrupts

Command lowerInternalIrq Arguments

Name Type Required Description

irq

int

yes

Interrupt number

Command raiseExternalIrq Arguments

Name Type Required Description

irq

int

yes

Interrupt number

Command raiseInternalIrq Arguments

Name Type Required Description

irq

int

yes

Interrupt number