Introduction

The SPARCv8 target comes in several variants, these include emulator cores for the ERC32 (technically a SPARCv7), LEON2, LEON3 and LEON4.

The individual targets only include the CPU core, and not any surrounding device models. The on-chip devices must be connected to the CPU core at configuration time.

Variants

These are the main variants of the SPARCv8 targets as supported by TEMU at present. Other variants can be added at request.

ERC32

The ERC32 core implements the SPARCv7 instruction set. It does not include the multiply and divide instructions from the SPARCv8. It also lacks the MMU.

LEON2

The LEON2 core implements the SPARCv8 instruction set as provided by the AT697F processor. Note that the LEON2 VHDL models also support some SPARCv8-E extensions (e.g. integer multiply accumulate instructions), but these extensions are not currently in the LEON2 core in order to be similar to the AT697F. The extensions are implemented and can be added in additional L2 models on request.

The LEON2 model supports caches. Note that it is the SoC model (not the CPU mode) that is the one implementing the cache control interfaces.

LEON3

The LEON3 core includes the SPARCv8 instruction set, some SPARCv8-E extensions (UMAC and SMAC instructions), the CASA instruction from the SPARCv9 ISA and the SR-MMU memory management unit.

The LEON3 model supports caches and implements the cache control interface for both instruction and data caches.

LEON4

The LEON3 core includes the SPARCv8 instruction set, some SPARCv8-E extensions, the CASA instruction from the SPARCv9 ISA and the SR-MMU memory management unit.

There are two differences from the LEON3:

  • Instruction timing uses values from LEON4 documentation.

  • Supports partial WRPSR when RD != 0. There is no real assembler syntax to express this instruction (and it disassembles to the normal wrpsr format).

  • Additional argument 'cputype' accepted when class is instantiated. This can be ngmp to ensure that %pc and %npc registers are reset with the correct values (i.e. 0c0000000 and 0xc0000004 respectively).

Operating System Compatibility

The SPARCv8 models have been executed successfully with:

  • Linux

  • RTEMS

  • XtratuM

  • XAL