Configuration

@GenericCache Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @GenericCache

new

Create new instance of GenericCache

Command new Arguments

Name Type Required Description

dataLineSize

int

no

Data cache line size

dataSize

int

no

Data cache size

dataWays

int

no

Data cache ways

instrLineSize

int

no

Instruction cache line size

instrSize

int

no

Instruction cache size

instrWays

int

no

Instruction cache ways

lineSize

int

no

Unified cache line size

name

string

yes

Name of object to create

separate

int

no

Separate instruction and data caches

size

int

no

Unified cache size

ways

int

no

Unified cache ways

wordSize

int

no

Word size

GenericCache Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

data.lineBits

uint32_t

data.lineMask

uint32_t

data.lineSize

uint32_t

line size in bytes

data.lineWordSizeLg2

uint32_t

log 2 of line-size in words

data.replacementPolicy

int32_t

data cache replacement policy (0=none, 1=lru, 2=lrr, 3=rnd)

data.rndReplaceWay

int32_t

data.setBits

uint32_t

data.setMask

uint32_t

data.setShift

uint32_t

data.sets

uint32_t

number of sets

data.status

uint32_t

status of data cache

data.ways

uint32_t

number of ways in the cache

dcacheCtrl

temu_IfaceRef/ <unknown>

data cache controller

fetchHits

uint64_t

fetchMisses

uint64_t

fetchPenalty

int32_t

icacheCtrl

temu_IfaceRef/ <unknown>

instruction cache controller

instr.lineBits

uint32_t

instr.lineMask

uint32_t

instr.lineSize

uint32_t

line size in bytes

instr.lineWordSizeLg2

uint32_t

log 2 of line-size in words

instr.replacementPolicy

int32_t

instruction cache replacement policy (0=none, 1=lru, 2=lrr, 3=rnd)

instr.rndReplaceWay

int32_t

instr.setBits

uint32_t

instr.setMask

uint32_t

instr.setShift

uint32_t

instr.sets

uint32_t

number of sets

instr.status

uint32_t

status of instruction cache

instr.ways

uint32_t

number of ways in the cache

isSplitCache

int32_t

isWriteAllocate

int32_t

isWriteBack

int32_t

postTransaction

temu_IfaceRef/ <unknown>

Post transaction interface for chaining

preTransaction

temu_IfaceRef/ <unknown>

Pre transaction interface for chaining

readHits

uint64_t

readMisses

uint64_t

readPenalty

int32_t

wordSize

int32_t

writeHits

uint64_t

writeMisses

uint64_t

writePenalty

int32_t

Interfaces

Name Type Description

DCacheIface

CacheIface

ICacheIface

CacheIface

ObjectIface

ObjectIface

PostAccessIface

MemAccessIface

PreAccessIface

MemAccessIface

Commands

Name Description

delete

Dispose instance of GenericCache

Arguments

size

Unified cache size in bytes.

instrSize

Instruction cache size in bytes.

dataSize

Data cache size in bytes.

ways

Number of ways in a unified cache (must be power of 2)

instrWays

Number of ways in instruction cache (must be power of 2)

dataWays

Number of ways in data cache (must be power of 2)

lineSize

Line size for unified cache

dataLineSize

Line size for data cache

instrLineSize

Line size for instruction cache

wordSize

Size of a word in bytes (defaults to 4)

separate

Set to 1 to turn the cache model to separate I- and D-caches. Set to 0 to make the cache a unified cache. This option affects the interpretation of the size, ways and lineSize arguments (see above).

Interfaces

The following interfaces can be used to connect the generic cache model:

PreAccessIface

A MemAccessIface that receives memory access events before they reach the target device.

PostAccessIface

A MemAccessIface that handles memory access events after they reach the target device.

Properties

The following properties are used for configuring the cache model and to connect the model in the object graph.

preTransaction

Memory access interface reference for next pre-access handler.

postTransaction

Memory access interface reference for next post-access handler.

icacheCtrl

Optional interface reference for a instruction cache controller object.

dcacheCtrl

Optional interface reference for a data cache controller object.

instr.replacementPolicy

Replacement policy used when fetching instructions. Set to 0 = NONE (or directly mapped / 1-way set associative cache). 1 = LRU, 2 = LRR and 3 = RND. Automatically set to 0 when ways is set to 1.

data.replacementPolicy

Replacement policy used when accessing data. Set to 0 = NONE (or directly mapped / 1-way set associative cache). 1 = LRU, 2 = LRR and 3 = RND. Automatically set to 0 when ways is set to 1.

isSplitCache

Cache is split and has separate instruction and data caches.

isWriteBack

Cache is write-back cache, not supported at the moment.

isWriteAllocate

Set to non-zero to have the cache allocate a line in case of a write miss. Set to zero to avoid line allocation.

fetchPenalty

Cost for fetching from a cached line.

readPenalty

Cost for reading from a cached line.

writePenalty

Cost for writing to a cached line.

wordSize

Word size for cache (defaults to 4, do not modify unless connecting to 64-bit processor architectures).

instr.sets

Number of sets in the instruction cache.

instr.ways

Number of ways in the instruction cache.

instr.lineSize

Instruction line size in bytes.

data.sets

Number of sets in the data cache.

data.ways

Number of ways in the data cache.

data.lineSize

Data line size in bytes.