Configuration
The config.gbitVariant property can be set to enable GRETH_GBIT extensions.
The extensions includes:
-
Gigabit speed.
-
IP header checksum offloading
-
TCP checksum offloading
-
UDP checksum offloading
-
Scatter / gather send lists.
Attributes
Properties
| Name | Type | Description |
|---|---|---|
ETHCTR |
uint32_t |
Ethernet Control Register |
ETHMDC |
uint32_t |
Ethernet MDIO Control and Status Register |
ETHRDP |
uint32_t |
Ethernet Receiver Descriptor Pointer Register |
ETHSIS |
uint32_t |
Ethernet Status and Interrupt Source Register |
ETHTDP |
uint32_t |
Ethernet Transmitter Descriptor Pointer Register |
MACLSB |
uint32_t |
Ethernet MAC Address LSB |
MACMSB |
uint32_t |
Ethernet MAC Address MSB |
config.checkCrc |
uint8_t |
Enable ethernet frame CRC checking. |
config.checkIpCrc |
uint8_t |
Enable IP header CRC checking. |
config.checkTcpCrc |
uint8_t |
Enable TCP header CRC checking. |
config.checkUdpCrc |
uint8_t |
Enable UDP header CRC checking. |
config.gbitVariant |
uint8_t |
Enable GRETH_GBIT behaviour. |
config.generateCrc |
uint8_t |
Enable ethernet frame CRC generation. |
config.irq |
uint8_t |
IRQ |
config.logTraffic |
uint8_t |
Enable traffic logging |
irqCtrl |
iref / IrqCtrlIface |
IRQ controller |
mac |
cstring |
Set MAC by string |
mdioBus |
iref / temu::MDIOIface |
MDIO bus |
memory |
iref / MemoryIface |
Memory |
object.timeSource |
object |
Time source object (a cpu or machine object) |
phy |
iref / temu::PHYIface |
PHY device |
Registers
| Register support is currently experimental! |
Register Bank registers
Register ETHCTR
Ethernet Control Register
Cold reset value: 0x0
Warm reset value: 0x0
| Field | Mask | Cold | Warm | Description |
|---|---|---|---|---|
EA |
0x80000000 |
0x0 |
0x0 |
EDCL available |
BS |
0x70000000 |
0x0 |
0x0 |
EDCL buffer size |
GA |
0x8000000 |
0x0 |
0x0 |
Gigabit MAC |
MA |
0x4000000 |
0x0 |
0x0 |
MDIO interrupts supported |
MC |
0x2000000 |
0x0 |
0x0 |
Multicast supported |
SP |
0x80 |
0x0 |
0x0 |
Speed |
RS |
0x40 |
0x0 |
0x0 |
Reset |
PM |
0x20 |
0x0 |
0x0 |
Open Packet Mode |
FD |
0x10 |
0x0 |
0x0 |
Full Duplex |
RI |
0x8 |
0x0 |
0x0 |
Enable Receiver Interrupts |
TI |
0x4 |
0x0 |
0x0 |
Enable Transmitter Interrupts |
RE |
0x2 |
0x0 |
0x0 |
Receive Enable |
TE |
0x1 |
0x0 |
0x0 |
Transmit Enable |
Register ETHSIS
Ethernet Status and Interrupt Source Register
Cold reset value: 0x0
Warm reset value: 0x0
| Field | Mask | Cold | Warm | Description |
|---|---|---|---|---|
IA |
0x80 |
0x0 |
0x0 |
Invalid Address |
TS |
0x40 |
0x0 |
0x0 |
Too Small |
TA |
0x20 |
0x0 |
0x0 |
Transmitter AHB Error |
RA |
0x10 |
0x0 |
0x0 |
Receiver AHB Error |
TI |
0x8 |
0x0 |
0x0 |
Transmitter Interrupt |
RI |
0x4 |
0x0 |
0x0 |
Receiver Interrupt |
TE |
0x2 |
0x0 |
0x0 |
Transmitter Error |
RE |
0x1 |
0x0 |
0x0 |
Receiver Error |
Register MACMSB
Ethernet MAC Address MSB
Cold reset value: 0x0
Warm reset value: 0x0
| Field | Mask | Cold | Warm | Description |
|---|---|---|---|---|
MSB |
0xffff |
0x0 |
0x0 |
Two MSB of MAC |
Register MACLSB
Ethernet MAC Address LSB
Cold reset value: 0x0
Warm reset value: 0x0
| Field | Mask | Cold | Warm | Description |
|---|---|---|---|---|
LSB |
0xffffffff |
0x0 |
0x0 |
Four LSB of MAC |
Register ETHMDC
Ethernet MDIO Control and Status Register
Cold reset value: 0x0
Warm reset value: 0x0
| Field | Mask | Cold | Warm | Description |
|---|---|---|---|---|
Data |
0xffff0000 |
0x0 |
0x0 |
Data for MMI read / write |
PHY_ADDR |
0xf800 |
0x0 |
0x0 |
PHY address |
REG_ADDR |
0x7c0 |
0x0 |
0x0 |
MII reg addr |
NV |
0x10 |
0x0 |
0x0 |
Not valid |
BU |
0x8 |
0x0 |
0x0 |
Busy |
LF |
0x4 |
0x0 |
0x0 |
Link fail |
RD |
0x2 |
0x0 |
0x0 |
Read |
WR |
0x1 |
0x0 |
0x0 |
Write |