PowerPC 750

The TEMU PowerPC 750 model, models a PPC750CX processor core.

@ppc750 Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @ppc750

new

Create new instance of ppc750

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

ppc750 Reference

Properties

Name Type Description

CPUId

uint32_t

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

cr

uint32_t

ctr

uint32_t

cycles

int64_t

dabr

uint32_t

dar

uint32_t

dbats

[uint32_t; 16]

dec

uint32_t

devices

temu_IfaceRefArray

dmal

uint32_t

dmau

uint32_t

dsisr

uint32_t

ear

uint32_t

fprs

[uint64_t; 32]

freq

uint64_t

gprs

[uint32_t; 32]

gqrs

[uint32_t; 8]

hids

[uint32_t; 4]

iabr

uint32_t

ibats

[uint32_t; 16]

ictc

uint32_t

irq

int8_t

irqClient

temu_IfaceRef/ <unknown>

l2cr

uint32_t

lr

uint32_t

machine

temu_IfaceRef/ <unknown>

memAccess

temu_IfaceRef/ <unknown>

memAccessL2

temu_IfaceRef/ <unknown>

memory

temu_IfaceRef/ <unknown>

mmcrs

[uint32_t; 2]

msr

uint32_t

nextEvent

int64_t

pc

uint32_t

pmcs

[uint32_t; 4]

powerState

uint32_t

pvr

uint32_t

sdr1

uint32_t

sia

uint32_t

sprgs

[uint32_t; 4]

srrs

[uint32_t; 2]

state

int32_t

steps

int64_t

tdch

uint32_t

tdcl

uint32_t

thrms

[uint32_t; 3]

uisa

uint32_t

ummcrs

[uint32_t; 2]

upmcs

[uint32_t; 4]

wpar

uint32_t

xer

uint32_t

Interfaces

Name Type Description

ClockIface

ClockIface

CpuIface

CpuIface

EventIface

EventIface

InvalidMemAccessIface

MemAccessIface

IrqIface

IrqCtrlIface

MemoryIface

MemoryIface

MmuMemAccessIface

MemAccessIface

ObjectIface

ObjectIface

PowerIface

PowerIface

PowerPCIface

PowerPCIface

ResetIface

ResetIface

Ports

Prop Iface Description

irqClient

IrqIface

interrupt controller interface

Commands

Name Description

delete

Dispose instance of ppc750

setPC

Set PC

Command setPC Arguments

Name Type Required Description

pc

int

yes

New pc

Limitations

  • No static timing model is defined at this moment. That means that one instruction take one cycle to finish.

  • AltiVec instructions are not implemented at this moment. These can be added if such a PowerPC model is requested.

  • MMU model is not yet validated against hardware.