TEMU 4.3.0

Floating licenses now supported using the TGSS LM (available separately).

PCI(e) API has been cleaned up and improved by fixing the configuration space APIs. Although still marked as experimental, it is closer to a stable version.

Object system now initializes the temu_Object properly, and does not rely on models to do this.

Additional performance statistics are now collected by the CPUs and the Scheduler.

Added support to set thread affinity for Scheduler.

Added a spinning Scheduler barrier, that improves performance on unbalanced CPU loads, this is the default. Previous barrier with backoff functionality is available as an opt-in.

Support manual traps in PowerPC

Improvements to branch target profiling used to trigger binary translation.

SPARC instructions wry and rdy are now translated.

PowerPC supports idle optimization of some instructions.

Binary translators and interpreter pre-decoders have been optimized to avoid traversing memory multiple times when fetching instructions.

Locking issues in memory space I/Os have been fixed.

APBUART assert could sometimes be incorrectly triggered in assert builds, when running in parallel.

Address an issue impacting inline restores of interface arrays.

GDB server now supports the PowerPC targets.

The relatively rare SPARCv8 mulscc instruction was incorrectly translated. Instruction is now interpreted, but correct.

Branches to a single instruction idle operation, could in some cases prevent the idle from being triggered.