Introduction
The GRIOMMU model is available in the GrIoMmu plugin.
Configuration
The model should be attached in two directions:
Firstly, IO-devices need to have their memory access interface references routed through the IOMMU.
To do this, connect the memory access iface ref in the device to IOMMUAccessIface in the IOMMU.
Secondly, the IOMMU needs to get access to the device’s AMBA PNP info.
The info is used to populate the MasterConfig registers.
To set the PNP info, attach it to the devicePnp array.
The IOMMUAccessIface and devicePnp array assumes that the same device indexes are used.
Not connecting devices the correct way is undefined behaviour.
// Connect command
connect a=iommu.devicePnp[0] b=device:ApbIface (1)
connect a=device.mem b=iommu:IOMMUAccessIface[0] (2)
// Or with assigmment syntax
iommu.devicePnp[0] = device:ApbIface (1)
device.mem = iommu:IOMMUAccessIface[0] (2)| 1 | Index should match index on next line. |
| 2 | Index should match index on previous line. |
@GRIOMMU Reference
GRIOMMU Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
TimeSource |
*void |
Time source object |
abhFailingAccess |
uint32_t |
AHB failing access register |
asmpAccessControl |
[uint32_t; 4] |
ASMP access control register |
capbility |
[uint32_t; 3] |
Capability register |
config.interrupt |
uint8_t |
Interrupt number |
control |
uint32_t |
Control register |
dataRamErrorInjection |
uint32_t |
Data RAM error injection register |
devicePnp |
[temu_IfaceRef; 16]/ <unknown> |
Devices under IOMMU control |
diagnosticCacheAccess |
uint32_t |
Diagnostic cache access register |
diagnosticCacheAccessData |
[uint32_t; 8] |
Diagnostic cache access data register |
diagnosticCacheAccessTag |
uint32_t |
Diagnostic cache access tag register |
groupConfig |
[uint32_t; 16] |
Group config register |
irq |
temu_IfaceRef/ <unknown> |
ASMP access control register |
irqMask |
uint32_t |
Interrupt mask register |
masterConfig |
[uint32_t; 16] |
Master config register |
mem |
temu_IfaceRef/ <unknown> |
Main memory bus |
status |
uint32_t |
Status register |
tagRamErrorInjection |
uint32_t |
Tag RAM error injection register |
tlbCacheFlush |
uint32_t |
TLB/cache flush register |