Introduction
The ARMv7 target in TEMU comes with support for the ARMv7-R sub target at the moment. A number of on-chip devices based on existing ARM based CPUs are available. Currently this includes a subset of the TMS570 devices.
Variants
ARMv7-R
The ARMv7-R core is available, it comes with an PMSA compliant MPU modelled on the Cortex-R5 MPU. Note that this differs slightly from the ARMv7-R architecture description. Especially, it lacks dedicated executable protection and uses read protection to handle fetch permission.
While the model is still in beta state, the model has been successfully used to run actual time and space partitioned hypervisors with partitions using different kernels (e.g. XtratuM / RTEMS / XAL is known to run).