ERC32
Attributes
Properties
| Name | Type | Description |
|---|---|---|
CPUId |
uint32_t |
|
asr |
[32 x uint32_t] |
|
cwp |
internalptr |
|
cycles |
int64_t |
|
devices |
irefarray / <unknown> |
|
extraRegs |
[32 x uint32_t] |
|
fprs |
[32 x uint32_t] |
|
freq |
uint64_t |
|
fsr |
uint32_t |
|
g |
[8 x uint32_t] |
|
gprs |
[128 x uint32_t] |
|
irq |
int8_t |
|
irqClient |
iref / <unknown> |
|
machine |
iref / <unknown> |
|
memAccess |
iref / <unknown> |
|
memAccessL2 |
iref / <unknown> |
|
memory |
iref / <unknown> |
|
mmuCtrl |
uint32_t |
|
mmuCtxt |
uint32_t |
|
mmuCtxtPtr |
uint32_t |
|
mmuFaultAddr |
uint32_t |
|
mmuFaultStat |
uint32_t |
|
nextEvent |
int64_t |
|
npc |
uint32_t |
|
object.timeSource |
object |
Time source object (a cpu or machine object) |
pc |
uint32_t |
|
powerState |
uint32_t |
|
psr |
uint32_t |
|
state |
int32_t |
|
steps |
int64_t |
|
stickyFlags |
uint32_t |
Set bit 0 to 1 to not exit CPU on halted mode. |
tbr |
uint32_t |
|
wim |
uint32_t |
Interfaces
| Name | Type | Description |
|---|---|---|
ClockIface |
ClockIface |
|
CpuIface |
CpuIface |
|
EventIface |
EventIface |
|
InvalidMemAccessIface |
MemAccessIface |
|
IrqIface |
IrqCtrlIface |
|
LegacyEventIface |
LegacyEventIface |
|
MemoryIface |
MemoryIface |
|
ObjectIface |
ObjectIface |
|
PowerIface |
PowerIface |
|
ResetIface |
ResetIface |
|
SparcIface |
SparcIface |