P2020 eSPI Model

This section describes the P2020 Enhanced Serial Peripheral Interface (eSPI) model.

The eSPI is a full-duplex, synchronous, character-oriented channel that supports a simple interface (receive, transmit and chip selects).

eSPI model contains names which include master/slave terminology. The TEMU project does not use such terms normally, however given that the hardware specification, this header deals with, use these terms they are reused here for consistency.

Loading the Plugin

import P2020

Configuration

Master device does not have a direct access to slave devices(and vice versa). Transmission and reception process is done through bus, the bus route on chip select signals.

The eSPI bus model can be configured by connecting SPI slave device interface to the spiSlaveDevices array, and master device to the spiMasterDevice.

Connecting via Command Line
# Connect eSPI device to eSPI bus via SpiSlaveDeviceIface
connect a=spiBus.spiSlaveDevices b=spidev:SpiSlaveDeviceIface
# Connect master interface from eSPI model to the bus
connect a=spiBus.spiMasterDevice b=espi:MasterDeviceIface
# Connect bus to the eSPI model
connect a=espi.spiBus b=spiBus:SpiBusIface
# Connect bus and the eSPI device
connect a=spidev.spiBus, spiBus:SpiBusIface
Connecting via API
// Connect eSPI device to eSPI bus via SpiSlaveDeviceIface
temu_connect(spiBus, "spiSlaveDevices", spidev, "SpiSlaveDeviceIface");
// Connect master interface from eSPI model to the bus
temu_connect(spiBus, "spiMasterDevice", espi, "MasterDeviceIface");
// Connect bus to the eSPI model
temu_connect(espi, "spiBus", spiBus, "SpiBusIface");
// Connect bus and the eSPI device
temu_connect(spidev, "spiBus", spiBus, "SpiBusIface");

The eSPI programmable registers that occupy memory-mapped space are named according to P2020 QorIQ integrated processor reference manual. All the registers are 4-byte wide:

Setting registers via Command Line
# Configure SPMODE register to enable normal operation
espi.SPMODE = 0x8000100F;
Setting registers via API
// Configure SPMODE register to enable normal operation
temu_writeValueU32(espi, "SPMODE", 0x8000100F, 0);

@eSPI Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @eSPI

new

Create new instance of eSPI

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

eSPI Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

SPCOM

uint32_t

eSPI command register

SPIE

uint32_t

eSPI event register

SPIM

uint32_t

eSPI mask register

SPIRF

uint32_t

eSPI receive FIFO access register

SPITF

uint32_t

eSPI transmit FIFO access register

SPMODE

uint32_t

eSPI mode register

SPMODE0

uint32_t

eSPI CS0 mode register

SPMODE1

uint32_t

eSPI CS1 mode register

SPMODE2

uint32_t

eSPI CS2 mode register

SPMODE3

uint32_t

eSPI CS3 mode register

TimeSource

*void

Time source object

chipType

uint8_t

Chip type

config.interrupt

uint8_t

eSPI IRQ number

irqCtrl

temu_IfaceRef/ <unknown>

Interrupt controller

rxFifo.data

[uint8_t; 32]

RX FIFO data

rxFifo.size

uint8_t

RX size

rxFifo.start

uint8_t

RX start index

rxFifo.usage

uint8_t

RX usage

spiBus

temu_IfaceRef/ <unknown>

Spi bus

txFifo.data

[uint8_t; 32]

TX FIFO data

txFifo.size

uint8_t

TX size

txFifo.start

uint8_t

TX start index

txFifo.usage

uint8_t

TX usage

Interfaces

Name Type Description

MasterDeviceIface

temu::SpiMasterDeviceIface

Communication interface.

MemAccessIface

MemAccessIface

Memory access interface.

Commands

Name Description

delete

Dispose instance of eSPI

Limitations

  • eSPI doesn’t generate the transfer clock SPI_CLK signal and doesn’t implement the eSPI baud rate generator (BRG).