NOEL-V
The NOEL-V models the NOEL-V RISC-V processor core of the same name. This includes the following instruction set extensions:
-
RV64I: 64-bit base instruction set
-
RV32I: 32-bit base instruction set
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M: Multiply and Divide
-
A: Atomics
-
FD: Single/Double precision floating point
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B: Bit-manipulation
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C: Compressed Instructions
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H: Hypervisor
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Zicntr: Counters
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Zicsr: Control and status register
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Zifencei: Instruction-fetch fence
The model is validated against the RISC-V conformance test suite.
@NOELV Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
TimeSource |
*void |
Time source object |
NOELV Reference
Properties
| Name | Type | Description |
|---|---|---|
CPUId |
uint32_t |
|
CPUType |
int32_t |
|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
TimeSource |
*void |
Time source object |
aclintCsrClient |
temu_IfaceRef/ <unknown> |
Aclint Csr interface |
aiaCsrClient |
temu_IfaceRef/ <unknown> |
Interrupt controller Csr interface |
config.exitOnSync |
uint8_t |
|
config.logTrampolines |
uint8_t |
|
config.measureExecTime |
uint8_t |
|
cpi |
double |
Cycles per instruction |
cycle |
uint64_t |
|
devices |
temu_IfaceRefArray |
|
exitReason |
int32_t |
|
fcsr |
uint32_t |
|
fflags |
uint64_t |
|
freq |
int64_t |
Frequency in Hz |
frm |
uint64_t |
|
gprs |
[uint64_t; 32] |
|
hcounteren |
uint64_t |
|
hedeleg |
uint64_t |
|
henvcfg |
uint64_t |
|
hgatp |
uint64_t |
|
hgeie |
uint64_t |
|
hgeip |
uint64_t |
|
hideleg |
uint64_t |
|
hie |
uint64_t |
|
hip |
uint64_t |
|
hstatus |
uint64_t |
|
htinst |
uint64_t |
|
htval |
uint64_t |
|
hvip |
uint64_t |
|
idleSteps |
int64_t |
|
instret |
uint64_t |
|
ipc |
double |
Instructions per cycle |
irqClient |
temu_IfaceRef/ <unknown> |
Interrupt controller (for ACKs) |
mcause |
uint64_t |
|
mcounteren |
uint32_t |
|
mcountinhibit |
uint32_t |
|
medeleg |
uint64_t |
|
memAccess |
temu_IfaceRef/ <unknown> |
Level 1 memory access interface (MMU) |
memAccessL2 |
temu_IfaceRef/ <unknown> |
Level 2 memory access interface (physical) |
memReset |
temu_IfaceRef/ <unknown> |
Memory space reset interface |
memSpace |
*void |
Memory space. |
menvcfg |
uint64_t |
|
mepc |
uint64_t |
|
mhartid |
uint64_t |
|
mhpmcounter |
[uint64_t; 29] |
|
mhpmevent |
[uint64_t; 29] |
|
mideleg |
uint64_t |
|
mie |
uint64_t |
|
mip |
uint64_t |
|
mireg |
uint64_t |
|
misa |
uint64_t |
|
miselect |
uint64_t |
|
mnstatus |
uint64_t |
|
mstatus |
uint64_t |
|
mtinst |
uint64_t |
|
mtopei |
uint64_t |
|
mtopi |
uint64_t |
|
mtval |
uint64_t |
|
mtval2 |
uint64_t |
|
mtvec |
uint64_t |
|
mvendorid |
uint64_t |
|
nextEvent |
int64_t |
Next event |
parentTimeSource |
*void |
Parent time source |
pc |
uint64_t |
Program counter register (pc) |
pdcManager |
temu_IfaceRef/ <unknown> |
Pre-decode cache manager (normally memory space) |
pmpaddr0 |
uint64_t |
|
pmpcfg0 |
uint64_t |
|
powerState |
uint32_t |
|
privilege |
uint64_t |
|
reservationSet |
[uint64_t; 3] |
|
satp |
uint64_t |
|
scause |
uint64_t |
|
scounteren |
uint32_t |
|
senvcfg |
uint64_t |
|
sepc |
uint64_t |
|
shpmcounter |
[uint64_t; 29] |
|
shpmevent |
[uint64_t; 29] |
|
sie |
uint64_t |
|
sip |
uint64_t |
|
sireg |
uint64_t |
|
siselect |
uint64_t |
|
skipIdleTags |
uint64_t |
|
sscratch |
uint64_t |
|
sstatus |
uint64_t |
|
startSteps |
int64_t |
Start steps of the time source |
state |
int32_t |
|
steps |
int64_t |
Steps of the time source |
stickyFlags |
uint32_t |
Set bit 0 to 1 to not exit CPU on halted mode. |
stopei |
uint64_t |
|
stopi |
uint64_t |
|
stval |
uint64_t |
|
stvec |
uint64_t |
|
targetExec |
temu_IfaceRef/ <unknown> |
Target execution interface |
targetSteps |
int64_t |
Target steps of the time source |
time |
uint64_t |
|
topPendingExternalInterrupt |
uint64_t |
|
vsatp |
uint64_t |
|
vscause |
uint64_t |
|
vsepc |
uint64_t |
|
vsie |
uint64_t |
|
vsip |
uint64_t |
|
vsscratch |
uint64_t |
|
vsstatus |
uint64_t |
|
vstval |
uint64_t |
|
vstvec |
uint64_t |
Interfaces
| Name | Type | Description |
|---|---|---|
AhbIface |
AhbIface |
|
AssemblerIface |
temu::AssemblerIface |
Assembler interface |
BinaryTranslationIface |
temu::BinaryTranslationControlIface |
|
ClockIface |
ClockIface |
|
CodePatternIface |
temu::CodePatternIface |
|
CpuIface |
temu::CpuIface |
|
ExecIface |
temu::TargetExecutionIface |
|
InvalidMemAccessIface |
MemAccessIface |
|
IrqIface |
IrqCtrlIface |
|
PhysicalMemAccessIface |
MemAccessIface |
|
RegisterIface |
temu::RegisterIface |
|
VirtualMemAccessIface |
MemAccessIface |
Commands
| Name | Description |
|---|---|
assemble |
Assemble instruction |
delete |
Dispose instance of NOELV |
disable-dbt |
Disable binary translation. |
disable-dbt-logging |
Disable logging when translating code. |
disable-dbt-validation |
Disable validation of emitted machine code. |
disable-hard-code-reset |
Disable hard resets of DBT emitter cache. |
disable-stats |
Disable statistics |
disable-translation-logging |
Disable jit-logging. |
disassemble |
Disassemble code |
disassemble-block |
Disassemble binary translated code block. |
enable-dbt |
Enable binary translation. |
enable-dbt-logging |
Enable logging when translating code. |
enable-dbt-validation |
Enable validation of emitted machine code. |
enable-hard-code-reset |
Enable hard resets of DBT emitter cache. |
enable-stats |
Enable statistics |
enable-translation-logging |
Enable jit-logging. |
enableHpm |
Enable performance monitor |
enableTraps |
Enable traps. |
pregs |
Print registers for CPU |
pstat |
Print CPU stats |
setPC |
Set PC |
setReg |
Set register |
translate-block |
Translate block. |
translate-func |
Translate function. |
Command assemble Arguments
| Name | Type | Required | Description |
|---|---|---|---|
inst |
string |
yes |
Instruction to assemble. |
pa |
int |
no |
Physical address |
va |
int |
no |
Virtual address |
Command disable-stats Arguments
| Name | Type | Required | Description |
|---|---|---|---|
stat |
string |
yes |
Name of statistics (executed-translated-instructions, executed-translated-blocks) |
Command disassemble Arguments
| Name | Type | Required | Description |
|---|---|---|---|
count |
int |
no |
Number of instructions |
pa |
int |
no |
Physical address |
va |
int |
no |
Virtual address |
Command disassemble-block Arguments
| Name | Type | Required | Description |
|---|---|---|---|
pa |
int |
no |
Physical address of block |
va |
int |
no |
Virtual address of block |
Command enable-stats Arguments
| Name | Type | Required | Description |
|---|---|---|---|
stat |
string |
yes |
Name of statistics (executed-translated-instructions, executed-translated-blocks) |
Command setReg Arguments
| Name | Type | Required | Description |
|---|---|---|---|
reg |
string |
yes |
Register name |
value |
int |
yes |
Value |