E500v2

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

TimeSource

*void

Time source object

delete

Dispose instance of @e500v2

new

Create new instance of e500v2

CPUId

uint32_t

CPUType

int32_t

Class

*void

Class object

ClockDivider

uint64_t

Current clock divider (relation CPU freq and CCB or TB freq).

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

TimeSource

*void

Time source object

acc

uint64_t

Accumulator register

atbl

uint32_t

atbu

uint32_t

bbear

uint32_t

bbtar

uint32_t

bucsr

uint32_t

config.CCBFrequency

uint64_t

CCB Clock Frequency

config.TBFrequency

uint64_t

Time Base Clock Frequency (same as RTC on e500)

config.exitOnSync

uint8_t

config.measureExecTime

uint8_t

cpi

double

Cycles per instruction

cr

uint32_t

csrrs

[uint32_t; 2]

ctr

uint32_t

dac1

uint32_t

dac2

uint32_t

dbcrs

[uint32_t; 3]

dbsr

uint32_t

dear

uint32_t

dec

uint32_t

decar

uint32_t

devices

temu_IfaceRefArray

dvc1

uint32_t

dvc2

uint32_t

esr

uint32_t

exitReason

int32_t

freq

int64_t

Frequency in Hz

gprs

[uint64_t; 32]

hid0

uint32_t

hid1

uint32_t

iac1

uint32_t

iac2

uint32_t

idleSteps

int64_t

ipc

double

Instructions per cycle

irq

int8_t

irqClient

temu_IfaceRef/ <unknown>

ivors

[uint32_t; 64]

ivpr

uint32_t

l1cfg0

uint32_t

l1cfg1

uint32_t

l1csr0

uint32_t

l1csr1

uint32_t

logTrampolines

uint8_t

lr

uint32_t

mass

[uint32_t; 7]

mcar

uint32_t

mcsr

uint32_t

mcsrrs

[uint32_t; 2]

memAccess

temu_IfaceRef/ <unknown>

Level 1 memory access interface (MMU)

memAccessL2

temu_IfaceRef/ <unknown>

Level 2 memory access interface (physical)

memReset

temu_IfaceRef/ <unknown>

Memory space reset interface

memSpace

*void

Memory space.

mmucfg

uint32_t

mmucsr0

uint32_t

msr

uint32_t

nextEvent

int64_t

Next event

parentTimeSource

*void

Parent time source

pc

uint32_t

Program counter

pdcManager

temu_IfaceRef/ <unknown>

Pre-decode cache manager (normally memory space)

pid0

uint32_t

pid1

uint32_t

pid2

uint32_t

pir

uint32_t

pmc0

uint32_t

pmc1

uint32_t

pmc2

uint32_t

pmc3

uint32_t

pmgc0

uint32_t

pmlca0

uint32_t

pmlca1

uint32_t

pmlca2

uint32_t

pmlca3

uint32_t

pmlcb0

uint32_t

pmlcb1

uint32_t

pmlcb2

uint32_t

pmlcb3

uint32_t

powerState

uint32_t

pvr

uint32_t

skipIdleTags

uint64_t

spefscr

uint32_t

spr976

uint32_t

sprgs

[uint32_t; 8]

srrs

[uint32_t; 2]

startSteps

int64_t

Start steps of the time source

state

int32_t

steps

int64_t

Steps of the time source

stickyFlags

uint32_t

Set bit 0 to 1 to not exit CPU on halted mode.

svr

uint32_t

targetExec

temu_IfaceRef/ <unknown>

Target execution interface

targetSteps

int64_t

Target steps of the time source

tcr

uint32_t

tlb0cfg

uint32_t

tlb1cfg

uint32_t

tsr

uint32_t

upmc0

uint32_t

upmc1

uint32_t

upmc2

uint32_t

upmc3

uint32_t

upmgc0

uint32_t

upmlca0

uint32_t

upmlca1

uint32_t

upmlca2

uint32_t

upmlca3

uint32_t

upmlcb0

uint32_t

upmlcb1

uint32_t

upmlcb2

uint32_t

upmlcb3

uint32_t

usrpg0

uint32_t

xer

uint32_t

AssemblerIface

temu::AssemblerIface

Assembler interface

BinaryTranslationIface

temu::BinaryTranslationControlIface

ClockIface

ClockIface

CodePatternIface

temu::CodePatternIface

CpuIface

temu::CpuIface

E500MMUIface

temu::E500MMUIface

MMU interface for the E500

ExecIface

temu::TargetExecutionIface

InvalidMemAccessIface

MemAccessIface

IrqIface

IrqCtrlIface

MmuMemAccessIface

MemAccessIface

MMU access interface

ObjectIface

ObjectIface

PhysicalMemAccessIface

MemAccessIface

PowerIface

PowerIface

PowerPCIface

temu::PowerPCIface

RegisterIface

temu::RegisterIface

ResetIface

ResetIface

VirtualMemAccessIface

MemAccessIface

irqClient

IrqIface

interrupt controller interface

add-call

Adds a call at the specific address. The call operation calls a predefined method which logs that it is invoked.It is primarily useful for debugging.

add-idle

Adds an explicit idle operation at the specific address.

add-skip

Adds a skip operation at the specific address. After this, the given number of instructions will be skipped.

assemble

Assemble instruction

delete

Dispose instance of e500v2

disable-dbt-logging

Disable logging when translating code.

disable-dbt-validation

Disable validation of emitted machine code.

disable-hard-code-reset

Disable hard resets of DBT emitter cache.

disable-stats

Disable statistics

disable-translation-logging

Disable jit-logging.

disassemble-block

Disassemble binary translated code block.

disassemble-block-option

Set option for disassembler. Switch between AT&T (default) and Intel (alternate) syntax. Enable / disable insruction latency in output.

enable-dbt-logging

Enable logging when translating code.

enable-dbt-validation

Enable validation of emitted machine code.

enable-hard-code-reset

Enable hard resets of DBT emitter cache.

enable-stats

Enable statistics

enable-translation-logging

Enable jit-logging.

pfregs

Print floating point registers for CPU

pregs

Print registers for CPU

printTLB0

Print TLB0

printTLB1

Print TLB1

pstat

Print CPU stats

raiseCritical

Raise critical interrupt

raiseExternal

Raise external interrupt

set-reg

Set register

setPC

Set PC

setTLB0Entry

Add entry to TLB0

setTLB1Entry

Add entry to TLB1

stacktrace

ABI stack trace

translate-block

Translate block.

translate-func

Translate function.

wake-up

Wakes up the processor.