GRLIB GRSPWROUTER Model

The GrSpwRouter device is part of the GRLIB IP library. It is available in libTEMUGrSpwRouter.so.

Loading the Plugin

import GrSpwRouter

Configuration

@GrSpwRouter Reference

Properties

Name	Type	Description
Class	*void	Class object
Component	*void	Pointer to component object if part of component
LoggingFlags	uint64_t	Flags for logging info
Name	*char	Object name
TimeSource	*void	Time source object

Name

Type

Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name	Description
delete	Dispose instance of @GrSpwRouter
new	Create new instance of GrSpwRouter

Name

Description

delete

Dispose instance of @GrSpwRouter

new

Create new instance of GrSpwRouter

Command new Arguments

Name	Type	Required	Description
name	string	yes	Name of object to create

Name

Type

Required

Description

name

string

yes

Name of object to create

GrSpwRouter Reference

Properties

Name	Type	Description
Class	*void	Class object
Component	*void	Pointer to component object if part of component
LoggingFlags	uint64_t	Flags for logging info
Name	*char	Object name
TimeSource	*void	Time source object
ambaPort0.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort0.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort0.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort0.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort0config.baseAddr	uint32_t	Base address
ambaPort0config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort0config.interrupt	uint8_t	Interrupt number
ambaPort0config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort0config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort0internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort0internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort0internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort0internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort0internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort0regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort0regs.destKey	uint32_t	Amba port destination key registers
ambaPort0regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort0regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort0regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort0regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort0regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort0regs.portCtrl	uint32_t	Amba ports control registers
ambaPort0regs.portStatus	uint32_t	Amba port status registers
ambaPort0regs.time	uint32_t	Amba port time registers
ambaPort1.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort1.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort1.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort1.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort10.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort10.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort10.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort10.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort10config.baseAddr	uint32_t	Base address
ambaPort10config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort10config.interrupt	uint8_t	Interrupt number
ambaPort10config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort10config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort10internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort10internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort10internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort10internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort10internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort10regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort10regs.destKey	uint32_t	Amba port destination key registers
ambaPort10regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort10regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort10regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort10regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort10regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort10regs.portCtrl	uint32_t	Amba ports control registers
ambaPort10regs.portStatus	uint32_t	Amba port status registers
ambaPort10regs.time	uint32_t	Amba port time registers
ambaPort11.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort11.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort11.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort11.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort11config.baseAddr	uint32_t	Base address
ambaPort11config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort11config.interrupt	uint8_t	Interrupt number
ambaPort11config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort11config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort11internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort11internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort11internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort11internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort11internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort11regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort11regs.destKey	uint32_t	Amba port destination key registers
ambaPort11regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort11regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort11regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort11regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort11regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort11regs.portCtrl	uint32_t	Amba ports control registers
ambaPort11regs.portStatus	uint32_t	Amba port status registers
ambaPort11regs.time	uint32_t	Amba port time registers
ambaPort12.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort12.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort12.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort12.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort12config.baseAddr	uint32_t	Base address
ambaPort12config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort12config.interrupt	uint8_t	Interrupt number
ambaPort12config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort12config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort12internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort12internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort12internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort12internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort12internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort12regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort12regs.destKey	uint32_t	Amba port destination key registers
ambaPort12regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort12regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort12regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort12regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort12regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort12regs.portCtrl	uint32_t	Amba ports control registers
ambaPort12regs.portStatus	uint32_t	Amba port status registers
ambaPort12regs.time	uint32_t	Amba port time registers
ambaPort13.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort13.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort13.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort13.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort13config.baseAddr	uint32_t	Base address
ambaPort13config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort13config.interrupt	uint8_t	Interrupt number
ambaPort13config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort13config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort13internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort13internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort13internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort13internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort13internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort13regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort13regs.destKey	uint32_t	Amba port destination key registers
ambaPort13regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort13regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort13regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort13regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort13regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort13regs.portCtrl	uint32_t	Amba ports control registers
ambaPort13regs.portStatus	uint32_t	Amba port status registers
ambaPort13regs.time	uint32_t	Amba port time registers
ambaPort14.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort14.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort14.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort14.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort14config.baseAddr	uint32_t	Base address
ambaPort14config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort14config.interrupt	uint8_t	Interrupt number
ambaPort14config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort14config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort14internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort14internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort14internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort14internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort14internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort14regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort14regs.destKey	uint32_t	Amba port destination key registers
ambaPort14regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort14regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort14regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort14regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort14regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort14regs.portCtrl	uint32_t	Amba ports control registers
ambaPort14regs.portStatus	uint32_t	Amba port status registers
ambaPort14regs.time	uint32_t	Amba port time registers
ambaPort15.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort15.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort15.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort15.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort15config.baseAddr	uint32_t	Base address
ambaPort15config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort15config.interrupt	uint8_t	Interrupt number
ambaPort15config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort15config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort15internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort15internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort15internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort15internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort15internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort15regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort15regs.destKey	uint32_t	Amba port destination key registers
ambaPort15regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort15regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort15regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort15regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort15regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort15regs.portCtrl	uint32_t	Amba ports control registers
ambaPort15regs.portStatus	uint32_t	Amba port status registers
ambaPort15regs.time	uint32_t	Amba port time registers
ambaPort1config.baseAddr	uint32_t	Base address
ambaPort1config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort1config.interrupt	uint8_t	Interrupt number
ambaPort1config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort1config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort1internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort1internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort1internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort1internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort1internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort1regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort1regs.destKey	uint32_t	Amba port destination key registers
ambaPort1regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort1regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort1regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort1regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort1regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort1regs.portCtrl	uint32_t	Amba ports control registers
ambaPort1regs.portStatus	uint32_t	Amba port status registers
ambaPort1regs.time	uint32_t	Amba port time registers
ambaPort2.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort2.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort2.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort2.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort2config.baseAddr	uint32_t	Base address
ambaPort2config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort2config.interrupt	uint8_t	Interrupt number
ambaPort2config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort2config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort2internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort2internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort2internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort2internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort2internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort2regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort2regs.destKey	uint32_t	Amba port destination key registers
ambaPort2regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort2regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort2regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort2regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort2regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort2regs.portCtrl	uint32_t	Amba ports control registers
ambaPort2regs.portStatus	uint32_t	Amba port status registers
ambaPort2regs.time	uint32_t	Amba port time registers
ambaPort3.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort3.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort3.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort3.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort3config.baseAddr	uint32_t	Base address
ambaPort3config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort3config.interrupt	uint8_t	Interrupt number
ambaPort3config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort3config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort3internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort3internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort3internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort3internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort3internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort3regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort3regs.destKey	uint32_t	Amba port destination key registers
ambaPort3regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort3regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort3regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort3regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort3regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort3regs.portCtrl	uint32_t	Amba ports control registers
ambaPort3regs.portStatus	uint32_t	Amba port status registers
ambaPort3regs.time	uint32_t	Amba port time registers
ambaPort4.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort4.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort4.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort4.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort4config.baseAddr	uint32_t	Base address
ambaPort4config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort4config.interrupt	uint8_t	Interrupt number
ambaPort4config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort4config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort4internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort4internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort4internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort4internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort4internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort4regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort4regs.destKey	uint32_t	Amba port destination key registers
ambaPort4regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort4regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort4regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort4regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort4regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort4regs.portCtrl	uint32_t	Amba ports control registers
ambaPort4regs.portStatus	uint32_t	Amba port status registers
ambaPort4regs.time	uint32_t	Amba port time registers
ambaPort5.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort5.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort5.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort5.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort5config.baseAddr	uint32_t	Base address
ambaPort5config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort5config.interrupt	uint8_t	Interrupt number
ambaPort5config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort5config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort5internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort5internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort5internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort5internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort5internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort5regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort5regs.destKey	uint32_t	Amba port destination key registers
ambaPort5regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort5regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort5regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort5regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort5regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort5regs.portCtrl	uint32_t	Amba ports control registers
ambaPort5regs.portStatus	uint32_t	Amba port status registers
ambaPort5regs.time	uint32_t	Amba port time registers
ambaPort6.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort6.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort6.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort6.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort6config.baseAddr	uint32_t	Base address
ambaPort6config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort6config.interrupt	uint8_t	Interrupt number
ambaPort6config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort6config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort6internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort6internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort6internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort6internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort6internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort6regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort6regs.destKey	uint32_t	Amba port destination key registers
ambaPort6regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort6regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort6regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort6regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort6regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort6regs.portCtrl	uint32_t	Amba ports control registers
ambaPort6regs.portStatus	uint32_t	Amba port status registers
ambaPort6regs.time	uint32_t	Amba port time registers
ambaPort7.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort7.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort7.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort7.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort7config.baseAddr	uint32_t	Base address
ambaPort7config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort7config.interrupt	uint8_t	Interrupt number
ambaPort7config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort7config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort7internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort7internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort7internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort7internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort7internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort7regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort7regs.destKey	uint32_t	Amba port destination key registers
ambaPort7regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort7regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort7regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort7regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort7regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort7regs.portCtrl	uint32_t	Amba ports control registers
ambaPort7regs.portStatus	uint32_t	Amba port status registers
ambaPort7regs.time	uint32_t	Amba port time registers
ambaPort8.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort8.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort8.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort8.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort8config.baseAddr	uint32_t	Base address
ambaPort8config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort8config.interrupt	uint8_t	Interrupt number
ambaPort8config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort8config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort8internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort8internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort8internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort8internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort8internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort8regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort8regs.destKey	uint32_t	Amba port destination key registers
ambaPort8regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort8regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort8regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort8regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort8regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort8regs.portCtrl	uint32_t	Amba ports control registers
ambaPort8regs.portStatus	uint32_t	Amba port status registers
ambaPort8regs.time	uint32_t	Amba port time registers
ambaPort9.internal.txCurrChan	uint8_t	Channel scheduled for transmission
ambaPort9.irqCtrl	temu_IfaceRef/ <unknown>	Irq controller used by the amba port to raise IRQs
ambaPort9.memAccess	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses
ambaPort9.memory	temu_IfaceRef/ <unknown>	Memory used by the amba port for DMA accesses (deprecated)
ambaPort9config.baseAddr	uint32_t	Base address
ambaPort9config.infiniteSpeed	uint8_t	If 1, the pack will be sent immediately
ambaPort9config.interrupt	uint8_t	Interrupt number
ambaPort9config.nsPerByte	uint64_t	Ns it takes to transfer each byte
ambaPort9config.realCrcCheck	uint8_t	If 1, the real CRC value will be calculated and check
ambaPort9internal.txDAddr	uint32_t	Data address for the scheduled dma engine transfer
ambaPort9internal.txDLength	uint32_t	Data length for the scheduled dma engine transfer
ambaPort9internal.txFlags	uint32_t	Flags for the scheduled dma engine transfer
ambaPort9internal.txHAddr	uint32_t	Header address for the scheduled dma engine transfer
ambaPort9internal.txType	uint8_t	Scheduled transmission type (dma engine/rmap)
ambaPort9regs.defaultAddr	uint32_t	Amba port default address registers
ambaPort9regs.destKey	uint32_t	Amba port destination key registers
ambaPort9regs.dmaChannelAddr	[uint32_t; 4]	Amba port dma channel address registers
ambaPort9regs.dmaCtrl	[uint32_t; 4]	Amba port dma control registers
ambaPort9regs.dmaRxDescTableAddr	[uint32_t; 4]	Amba port dma receive descriptor table address registers
ambaPort9regs.dmaRxMaxLen	[uint32_t; 4]	Amba port dma receive max length registers
ambaPort9regs.dmaTxDescTableAddr	[uint32_t; 4]	Amba port dma transfer descriptor table address registers
ambaPort9regs.portCtrl	uint32_t	Amba ports control registers
ambaPort9regs.portStatus	uint32_t	Amba port status registers
ambaPort9regs.time	uint32_t	Amba port time registers
config.ahbCfgBaseAddr	uint32_t	Base address of the AHB configuration port
config.ahbCfgEnabled	uint8_t	Ahb configuration port enabled
config.ambaPortsNum	uint8_t	Number of AMBA ports
config.instanceId	uint8_t	Value of Instance-ID field in Version/InstanceId register
config.majorVersion	uint8_t	Value of major version field in Version/InstanceId register
config.minorVersion	uint8_t	Value of minor version field in Version/InstanceId register
config.patch	uint8_t	Value of patch field in Version/InstanceId register
config.spwPortsNum	uint8_t	Number of SpaceWire ports
config.staticRountingEnabled	uint8_t	Static routing enabled
internal.ahbConfigPort.pnp.bar	[uint32_t; 4]	Pnp BAR for the AHB configuration port
internal.ahbConfigPort.pnp.ident	uint32_t	Pnp identification region word for the AHB configuration port
internal.ahbConfigPort.pnp.user	[uint32_t; 3]	Pnp user defined words for the AHB configuration port
internal.spwSpwLinkState	[int32_t; 31]	Link state of the SpaceWire port
regs.cfgWriteEnable	uint32_t	Configuration write enable register
regs.incCharCount	[uint32_t; 31]	Incoming character count register
regs.incPktCount	[uint32_t; 31]	Incoming packet count register
regs.initDiv	uint32_t	Initialization divisor register
regs.outCharCount	[uint32_t; 31]	Outgoing character count register
regs.outPktCount	[uint32_t; 31]	Outgoing packet count register
regs.portCtrl	[uint32_t; 32]	Port control registers for ports [0-31]
regs.portCtrl2	[uint32_t; 32]	Port control 2 registers for ports [0-31]
regs.portSetup	[uint32_t; 255]	Port setup registers for ports [1-31] and logical addresses [32-255]
regs.portStatus	[uint32_t; 32]	Port status registers for ports [0-31]
regs.routerCfgSt	uint32_t	Router configuration/status register
regs.routingTable	[uint32_t; 223]	Routing table entry registers for logical addresses [32-255]
regs.timeCode	uint32_t	Time code register
regs.timerPrescalerReload	uint32_t	Timer prescaler reload register
regs.timerReload	[uint32_t; 32]	Timer reload registers for ports [0-31]
regs.versionInstanceId	uint32_t	Version / Instance Id register
spwUplink	[temu_IfaceRef; 31]/ <unknown>	SpaceWire devices connected to the port

Name

Type

Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

ambaPort0.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort0.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort0.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort0.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort0config.baseAddr

uint32_t

Base address

ambaPort0config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort0config.interrupt

uint8_t

Interrupt number

ambaPort0config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort0config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort0internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort0internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort0internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort0internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort0internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort0regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort0regs.destKey

uint32_t

Amba port destination key registers

ambaPort0regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort0regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort0regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort0regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort0regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort0regs.portCtrl

uint32_t

Amba ports control registers

ambaPort0regs.portStatus

uint32_t

Amba port status registers

ambaPort0regs.time

uint32_t

Amba port time registers

ambaPort1.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort1.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort1.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort1.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort10.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort10.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort10.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort10.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort10config.baseAddr

uint32_t

Base address

ambaPort10config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort10config.interrupt

uint8_t

Interrupt number

ambaPort10config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort10config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort10internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort10internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort10internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort10internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort10internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort10regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort10regs.destKey

uint32_t

Amba port destination key registers

ambaPort10regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort10regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort10regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort10regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort10regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort10regs.portCtrl

uint32_t

Amba ports control registers

ambaPort10regs.portStatus

uint32_t

Amba port status registers

ambaPort10regs.time

uint32_t

Amba port time registers

ambaPort11.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort11.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort11.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort11.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort11config.baseAddr

uint32_t

Base address

ambaPort11config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort11config.interrupt

uint8_t

Interrupt number

ambaPort11config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort11config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort11internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort11internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort11internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort11internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort11internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort11regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort11regs.destKey

uint32_t

Amba port destination key registers

ambaPort11regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort11regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort11regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort11regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort11regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort11regs.portCtrl

uint32_t

Amba ports control registers

ambaPort11regs.portStatus

uint32_t

Amba port status registers

ambaPort11regs.time

uint32_t

Amba port time registers

ambaPort12.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort12.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort12.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort12.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort12config.baseAddr

uint32_t

Base address

ambaPort12config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort12config.interrupt

uint8_t

Interrupt number

ambaPort12config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort12config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort12internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort12internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort12internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort12internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort12internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort12regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort12regs.destKey

uint32_t

Amba port destination key registers

ambaPort12regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort12regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort12regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort12regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort12regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort12regs.portCtrl

uint32_t

Amba ports control registers

ambaPort12regs.portStatus

uint32_t

Amba port status registers

ambaPort12regs.time

uint32_t

Amba port time registers

ambaPort13.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort13.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort13.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort13.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort13config.baseAddr

uint32_t

Base address

ambaPort13config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort13config.interrupt

uint8_t

Interrupt number

ambaPort13config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort13config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort13internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort13internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort13internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort13internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort13internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort13regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort13regs.destKey

uint32_t

Amba port destination key registers

ambaPort13regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort13regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort13regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort13regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort13regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort13regs.portCtrl

uint32_t

Amba ports control registers

ambaPort13regs.portStatus

uint32_t

Amba port status registers

ambaPort13regs.time

uint32_t

Amba port time registers

ambaPort14.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort14.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort14.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort14.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort14config.baseAddr

uint32_t

Base address

ambaPort14config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort14config.interrupt

uint8_t

Interrupt number

ambaPort14config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort14config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort14internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort14internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort14internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort14internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort14internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort14regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort14regs.destKey

uint32_t

Amba port destination key registers

ambaPort14regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort14regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort14regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort14regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort14regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort14regs.portCtrl

uint32_t

Amba ports control registers

ambaPort14regs.portStatus

uint32_t

Amba port status registers

ambaPort14regs.time

uint32_t

Amba port time registers

ambaPort15.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort15.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort15.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort15.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort15config.baseAddr

uint32_t

Base address

ambaPort15config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort15config.interrupt

uint8_t

Interrupt number

ambaPort15config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort15config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort15internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort15internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort15internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort15internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort15internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort15regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort15regs.destKey

uint32_t

Amba port destination key registers

ambaPort15regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort15regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort15regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort15regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort15regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort15regs.portCtrl

uint32_t

Amba ports control registers

ambaPort15regs.portStatus

uint32_t

Amba port status registers

ambaPort15regs.time

uint32_t

Amba port time registers

ambaPort1config.baseAddr

uint32_t

Base address

ambaPort1config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort1config.interrupt

uint8_t

Interrupt number

ambaPort1config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort1config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort1internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort1internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort1internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort1internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort1internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort1regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort1regs.destKey

uint32_t

Amba port destination key registers

ambaPort1regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort1regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort1regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort1regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort1regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort1regs.portCtrl

uint32_t

Amba ports control registers

ambaPort1regs.portStatus

uint32_t

Amba port status registers

ambaPort1regs.time

uint32_t

Amba port time registers

ambaPort2.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort2.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort2.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort2.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort2config.baseAddr

uint32_t

Base address

ambaPort2config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort2config.interrupt

uint8_t

Interrupt number

ambaPort2config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort2config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort2internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort2internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort2internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort2internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort2internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort2regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort2regs.destKey

uint32_t

Amba port destination key registers

ambaPort2regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort2regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort2regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort2regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort2regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort2regs.portCtrl

uint32_t

Amba ports control registers

ambaPort2regs.portStatus

uint32_t

Amba port status registers

ambaPort2regs.time

uint32_t

Amba port time registers

ambaPort3.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort3.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort3.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort3.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort3config.baseAddr

uint32_t

Base address

ambaPort3config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort3config.interrupt

uint8_t

Interrupt number

ambaPort3config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort3config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort3internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort3internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort3internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort3internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort3internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort3regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort3regs.destKey

uint32_t

Amba port destination key registers

ambaPort3regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort3regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort3regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort3regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort3regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort3regs.portCtrl

uint32_t

Amba ports control registers

ambaPort3regs.portStatus

uint32_t

Amba port status registers

ambaPort3regs.time

uint32_t

Amba port time registers

ambaPort4.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort4.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort4.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort4.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort4config.baseAddr

uint32_t

Base address

ambaPort4config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort4config.interrupt

uint8_t

Interrupt number

ambaPort4config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort4config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort4internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort4internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort4internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort4internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort4internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort4regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort4regs.destKey

uint32_t

Amba port destination key registers

ambaPort4regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort4regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort4regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort4regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort4regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort4regs.portCtrl

uint32_t

Amba ports control registers

ambaPort4regs.portStatus

uint32_t

Amba port status registers

ambaPort4regs.time

uint32_t

Amba port time registers

ambaPort5.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort5.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort5.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort5.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort5config.baseAddr

uint32_t

Base address

ambaPort5config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort5config.interrupt

uint8_t

Interrupt number

ambaPort5config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort5config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort5internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort5internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort5internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort5internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort5internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort5regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort5regs.destKey

uint32_t

Amba port destination key registers

ambaPort5regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort5regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort5regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort5regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort5regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort5regs.portCtrl

uint32_t

Amba ports control registers

ambaPort5regs.portStatus

uint32_t

Amba port status registers

ambaPort5regs.time

uint32_t

Amba port time registers

ambaPort6.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort6.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort6.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort6.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort6config.baseAddr

uint32_t

Base address

ambaPort6config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort6config.interrupt

uint8_t

Interrupt number

ambaPort6config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort6config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort6internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort6internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort6internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort6internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort6internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort6regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort6regs.destKey

uint32_t

Amba port destination key registers

ambaPort6regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort6regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort6regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort6regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort6regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort6regs.portCtrl

uint32_t

Amba ports control registers

ambaPort6regs.portStatus

uint32_t

Amba port status registers

ambaPort6regs.time

uint32_t

Amba port time registers

ambaPort7.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort7.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort7.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort7.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort7config.baseAddr

uint32_t

Base address

ambaPort7config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort7config.interrupt

uint8_t

Interrupt number

ambaPort7config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort7config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort7internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort7internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort7internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort7internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort7internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort7regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort7regs.destKey

uint32_t

Amba port destination key registers

ambaPort7regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort7regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort7regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort7regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort7regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort7regs.portCtrl

uint32_t

Amba ports control registers

ambaPort7regs.portStatus

uint32_t

Amba port status registers

ambaPort7regs.time

uint32_t

Amba port time registers

ambaPort8.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort8.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort8.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort8.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort8config.baseAddr

uint32_t

Base address

ambaPort8config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort8config.interrupt

uint8_t

Interrupt number

ambaPort8config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort8config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort8internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort8internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort8internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort8internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort8internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort8regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort8regs.destKey

uint32_t

Amba port destination key registers

ambaPort8regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort8regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort8regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort8regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort8regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort8regs.portCtrl

uint32_t

Amba ports control registers

ambaPort8regs.portStatus

uint32_t

Amba port status registers

ambaPort8regs.time

uint32_t

Amba port time registers

ambaPort9.internal.txCurrChan

uint8_t

Channel scheduled for transmission

ambaPort9.irqCtrl

temu_IfaceRef/ <unknown>

Irq controller used by the amba port to raise IRQs

ambaPort9.memAccess

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses

ambaPort9.memory

temu_IfaceRef/ <unknown>

Memory used by the amba port for DMA accesses (deprecated)

ambaPort9config.baseAddr

uint32_t

Base address

ambaPort9config.infiniteSpeed

uint8_t

If 1, the pack will be sent immediately

ambaPort9config.interrupt

uint8_t

Interrupt number

ambaPort9config.nsPerByte

uint64_t

Ns it takes to transfer each byte

ambaPort9config.realCrcCheck

uint8_t

If 1, the real CRC value will be calculated and check

ambaPort9internal.txDAddr

uint32_t

Data address for the scheduled dma engine transfer

ambaPort9internal.txDLength

uint32_t

Data length for the scheduled dma engine transfer

ambaPort9internal.txFlags

uint32_t

Flags for the scheduled dma engine transfer

ambaPort9internal.txHAddr

uint32_t

Header address for the scheduled dma engine transfer

ambaPort9internal.txType

uint8_t

Scheduled transmission type (dma engine/rmap)

ambaPort9regs.defaultAddr

uint32_t

Amba port default address registers

ambaPort9regs.destKey

uint32_t

Amba port destination key registers

ambaPort9regs.dmaChannelAddr

[uint32_t; 4]

Amba port dma channel address registers

ambaPort9regs.dmaCtrl

[uint32_t; 4]

Amba port dma control registers

ambaPort9regs.dmaRxDescTableAddr

[uint32_t; 4]

Amba port dma receive descriptor table address registers

ambaPort9regs.dmaRxMaxLen

[uint32_t; 4]

Amba port dma receive max length registers

ambaPort9regs.dmaTxDescTableAddr

[uint32_t; 4]

Amba port dma transfer descriptor table address registers

ambaPort9regs.portCtrl

uint32_t

Amba ports control registers

ambaPort9regs.portStatus

uint32_t

Amba port status registers

ambaPort9regs.time

uint32_t

Amba port time registers

config.ahbCfgBaseAddr

uint32_t

Base address of the AHB configuration port

config.ahbCfgEnabled

uint8_t

Ahb configuration port enabled

config.ambaPortsNum

uint8_t

Number of AMBA ports

config.instanceId

uint8_t

Value of Instance-ID field in Version/InstanceId register

config.majorVersion

uint8_t

Value of major version field in Version/InstanceId register

config.minorVersion

uint8_t

Value of minor version field in Version/InstanceId register

config.patch

uint8_t

Value of patch field in Version/InstanceId register

config.spwPortsNum

uint8_t

Number of SpaceWire ports

config.staticRountingEnabled

uint8_t

Static routing enabled

internal.ahbConfigPort.pnp.bar

[uint32_t; 4]

Pnp BAR for the AHB configuration port

internal.ahbConfigPort.pnp.ident

uint32_t

Pnp identification region word for the AHB configuration port

internal.ahbConfigPort.pnp.user

[uint32_t; 3]

Pnp user defined words for the AHB configuration port

internal.spwSpwLinkState

[int32_t; 31]

Link state of the SpaceWire port

regs.cfgWriteEnable

uint32_t

Configuration write enable register

regs.incCharCount

[uint32_t; 31]

Incoming character count register

regs.incPktCount

[uint32_t; 31]

Incoming packet count register

regs.initDiv

uint32_t

Initialization divisor register

regs.outCharCount

[uint32_t; 31]

Outgoing character count register

regs.outPktCount

[uint32_t; 31]

Outgoing packet count register

regs.portCtrl

[uint32_t; 32]

Port control registers for ports [0-31]

regs.portCtrl2

[uint32_t; 32]

Port control 2 registers for ports [0-31]

regs.portSetup

[uint32_t; 255]

Port setup registers for ports [1-31] and logical addresses [32-255]

regs.portStatus

[uint32_t; 32]

Port status registers for ports [0-31]

regs.routerCfgSt

uint32_t

Router configuration/status register

regs.routingTable

[uint32_t; 223]

Routing table entry registers for logical addresses [32-255]

regs.timeCode

uint32_t

Time code register

regs.timerPrescalerReload

uint32_t

Timer prescaler reload register

regs.timerReload

[uint32_t; 32]

Timer reload registers for ports [0-31]

regs.versionInstanceId

uint32_t

Version / Instance Id register

spwUplink

[temu_IfaceRef; 31]/ <unknown>

SpaceWire devices connected to the port

Interfaces

Name	Type	Description
SpwPortIface	SpwPortIface	SpaceWire ports interfaces
ahbConfigPortAhbIface	AhbIface	AHB configuration port AHB interface
ahbConfigPortMemAccessIf	MemAccessIface	AHB configuration port memory access interface
ambaPortApbIface	ApbIface	Apb interface
ambaPortMemAccessIface	MemAccessIface	Amba port memory access interface

Name

Type

Description

SpwPortIface

SpaceWire ports interfaces

ahbConfigPortAhbIface

AhbIface

AHB configuration port AHB interface

ahbConfigPortMemAccessIf

MemAccessIface

AHB configuration port memory access interface

ambaPortApbIface

ApbIface

Apb interface

ambaPortMemAccessIface

MemAccessIface

Amba port memory access interface

Commands

Name	Description
delete	Dispose instance of GrSpwRouter

Name

Description

delete

Dispose instance of GrSpwRouter

GRLIB GRSPWROUTER Model

Loading the Plugin

Configuration

@GrSpwRouter Reference

Properties

Commands

Command new Arguments

GrSpwRouter Reference

Properties

Interfaces

Commands

Limitations