GRLIB GRSPWROUTER Model
The GrSpwRouter device is part of the GRLIB IP library.
It is available in libTEMUGrSpwRouter.so.
@GrSpwRouter Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
GrSpwRouter Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
ambaPort0.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort0.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort0.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort0config.baseAddr |
uint32_t |
Base address |
ambaPort0config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort0config.interrupt |
uint8_t |
Interrupt number |
ambaPort0config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort0config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort0config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort0config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort0config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort0config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort0config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort0internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort0internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort0internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort0internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort0internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort0internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort0internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort0internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort0internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort0internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort0internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort0internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort0internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort0internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort0internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort0internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort0internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort0regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort0regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort0regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort0regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort0regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort0regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort0regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort0regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort0regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort0regs.time |
uint32_t |
Amba port time registers |
ambaPort1.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort1.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort1.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort10.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort10.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort10.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort10config.baseAddr |
uint32_t |
Base address |
ambaPort10config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort10config.interrupt |
uint8_t |
Interrupt number |
ambaPort10config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort10config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort10config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort10config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort10config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort10config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort10config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort10internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort10internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort10internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort10internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort10internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort10internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort10internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort10internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort10internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort10internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort10internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort10internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort10internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort10internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort10internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort10internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort10internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort10regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort10regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort10regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort10regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort10regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort10regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort10regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort10regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort10regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort10regs.time |
uint32_t |
Amba port time registers |
ambaPort11.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort11.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort11.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort11config.baseAddr |
uint32_t |
Base address |
ambaPort11config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort11config.interrupt |
uint8_t |
Interrupt number |
ambaPort11config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort11config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort11config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort11config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort11config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort11config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort11config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort11internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort11internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort11internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort11internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort11internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort11internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort11internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort11internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort11internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort11internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort11internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort11internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort11internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort11internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort11internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort11internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort11internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort11regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort11regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort11regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort11regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort11regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort11regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort11regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort11regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort11regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort11regs.time |
uint32_t |
Amba port time registers |
ambaPort12.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort12.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort12.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort12config.baseAddr |
uint32_t |
Base address |
ambaPort12config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort12config.interrupt |
uint8_t |
Interrupt number |
ambaPort12config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort12config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort12config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort12config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort12config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort12config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort12config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort12internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort12internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort12internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort12internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort12internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort12internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort12internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort12internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort12internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort12internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort12internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort12internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort12internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort12internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort12internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort12internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort12internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort12regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort12regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort12regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort12regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort12regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort12regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort12regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort12regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort12regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort12regs.time |
uint32_t |
Amba port time registers |
ambaPort13.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort13.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort13.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort13config.baseAddr |
uint32_t |
Base address |
ambaPort13config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort13config.interrupt |
uint8_t |
Interrupt number |
ambaPort13config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort13config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort13config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort13config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort13config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort13config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort13config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort13internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort13internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort13internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort13internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort13internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort13internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort13internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort13internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort13internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort13internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort13internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort13internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort13internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort13internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort13internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort13internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort13internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort13regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort13regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort13regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort13regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort13regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort13regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort13regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort13regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort13regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort13regs.time |
uint32_t |
Amba port time registers |
ambaPort14.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort14.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort14.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort14config.baseAddr |
uint32_t |
Base address |
ambaPort14config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort14config.interrupt |
uint8_t |
Interrupt number |
ambaPort14config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort14config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort14config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort14config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort14config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort14config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort14config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort14internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort14internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort14internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort14internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort14internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort14internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort14internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort14internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort14internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort14internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort14internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort14internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort14internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort14internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort14internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort14internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort14internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort14regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort14regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort14regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort14regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort14regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort14regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort14regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort14regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort14regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort14regs.time |
uint32_t |
Amba port time registers |
ambaPort15.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort15.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort15.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort15config.baseAddr |
uint32_t |
Base address |
ambaPort15config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort15config.interrupt |
uint8_t |
Interrupt number |
ambaPort15config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort15config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort15config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort15config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort15config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort15config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort15config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort15internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort15internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort15internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort15internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort15internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort15internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort15internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort15internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort15internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort15internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort15internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort15internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort15internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort15internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort15internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort15internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort15internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort15regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort15regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort15regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort15regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort15regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort15regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort15regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort15regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort15regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort15regs.time |
uint32_t |
Amba port time registers |
ambaPort1config.baseAddr |
uint32_t |
Base address |
ambaPort1config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort1config.interrupt |
uint8_t |
Interrupt number |
ambaPort1config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort1config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort1config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort1config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort1config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort1config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort1config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort1internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort1internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort1internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort1internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort1internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort1internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort1internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort1internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort1internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort1internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort1internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort1internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort1internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort1internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort1internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort1internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort1internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort1regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort1regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort1regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort1regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort1regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort1regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort1regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort1regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort1regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort1regs.time |
uint32_t |
Amba port time registers |
ambaPort2.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort2.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort2.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort2config.baseAddr |
uint32_t |
Base address |
ambaPort2config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort2config.interrupt |
uint8_t |
Interrupt number |
ambaPort2config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort2config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort2config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort2config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort2config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort2config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort2config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort2internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort2internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort2internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort2internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort2internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort2internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort2internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort2internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort2internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort2internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort2internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort2internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort2internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort2internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort2internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort2internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort2internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort2regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort2regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort2regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort2regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort2regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort2regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort2regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort2regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort2regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort2regs.time |
uint32_t |
Amba port time registers |
ambaPort3.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort3.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort3.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort3config.baseAddr |
uint32_t |
Base address |
ambaPort3config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort3config.interrupt |
uint8_t |
Interrupt number |
ambaPort3config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort3config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort3config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort3config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort3config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort3config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort3config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort3internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort3internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort3internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort3internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort3internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort3internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort3internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort3internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort3internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort3internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort3internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort3internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort3internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort3internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort3internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort3internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort3internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort3regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort3regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort3regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort3regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort3regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort3regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort3regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort3regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort3regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort3regs.time |
uint32_t |
Amba port time registers |
ambaPort4.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort4.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort4.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort4config.baseAddr |
uint32_t |
Base address |
ambaPort4config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort4config.interrupt |
uint8_t |
Interrupt number |
ambaPort4config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort4config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort4config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort4config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort4config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort4config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort4config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort4internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort4internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort4internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort4internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort4internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort4internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort4internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort4internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort4internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort4internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort4internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort4internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort4internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort4internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort4internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort4internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort4internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort4regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort4regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort4regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort4regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort4regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort4regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort4regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort4regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort4regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort4regs.time |
uint32_t |
Amba port time registers |
ambaPort5.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort5.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort5.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort5config.baseAddr |
uint32_t |
Base address |
ambaPort5config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort5config.interrupt |
uint8_t |
Interrupt number |
ambaPort5config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort5config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort5config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort5config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort5config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort5config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort5config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort5internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort5internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort5internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort5internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort5internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort5internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort5internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort5internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort5internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort5internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort5internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort5internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort5internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort5internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort5internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort5internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort5internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort5regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort5regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort5regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort5regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort5regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort5regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort5regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort5regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort5regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort5regs.time |
uint32_t |
Amba port time registers |
ambaPort6.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort6.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort6.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort6config.baseAddr |
uint32_t |
Base address |
ambaPort6config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort6config.interrupt |
uint8_t |
Interrupt number |
ambaPort6config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort6config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort6config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort6config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort6config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort6config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort6config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort6internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort6internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort6internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort6internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort6internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort6internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort6internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort6internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort6internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort6internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort6internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort6internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort6internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort6internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort6internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort6internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort6internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort6regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort6regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort6regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort6regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort6regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort6regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort6regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort6regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort6regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort6regs.time |
uint32_t |
Amba port time registers |
ambaPort7.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort7.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort7.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort7config.baseAddr |
uint32_t |
Base address |
ambaPort7config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort7config.interrupt |
uint8_t |
Interrupt number |
ambaPort7config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort7config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort7config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort7config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort7config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort7config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort7config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort7internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort7internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort7internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort7internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort7internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort7internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort7internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort7internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort7internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort7internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort7internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort7internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort7internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort7internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort7internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort7internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort7internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort7regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort7regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort7regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort7regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort7regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort7regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort7regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort7regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort7regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort7regs.time |
uint32_t |
Amba port time registers |
ambaPort8.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort8.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort8.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort8config.baseAddr |
uint32_t |
Base address |
ambaPort8config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort8config.interrupt |
uint8_t |
Interrupt number |
ambaPort8config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort8config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort8config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort8config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort8config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort8config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort8config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort8internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort8internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort8internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort8internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort8internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort8internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort8internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort8internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort8internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort8internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort8internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort8internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort8internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort8internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort8internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort8internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort8internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort8regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort8regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort8regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort8regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort8regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort8regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort8regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort8regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort8regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort8regs.time |
uint32_t |
Amba port time registers |
ambaPort9.internal.txCurrChan |
uint8_t |
Channel scheduled for transmission |
ambaPort9.irqCtrl |
temu_IfaceRef/ <unknown> |
Irq controller used by the amba port to raise IRQs |
ambaPort9.memAccess |
temu_IfaceRef/ <unknown> |
Memory used by the amba port for DMA accesses |
ambaPort9config.baseAddr |
uint32_t |
Base address |
ambaPort9config.infiniteSpeed |
uint8_t |
If 1, the pack will be sent immediately |
ambaPort9config.interrupt |
uint8_t |
Interrupt number |
ambaPort9config.logRxHeader |
uint8_t |
Log Packet received by the port |
ambaPort9config.logRxPkt |
uint8_t |
Log Packet received by the port |
ambaPort9config.logTxHeader |
uint8_t |
Log Packet transmitted from port |
ambaPort9config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
ambaPort9config.nsPerByte |
uint64_t |
Ns it takes to transfer each byte |
ambaPort9config.realCrcCheck |
uint8_t |
If 1, the real CRC value will be calculated and check |
ambaPort9config.rxHoldQueueDepth |
uint32_t |
Packets a DMA channel holds when no-spill is set and no descriptor is available (zero always spills). |
ambaPort9internal.ambiguousChanAddrWarned |
uint8_t |
Ambiguous channel address reported |
ambaPort9internal.heldRxPkt0 |
temu::list::Buffer |
Packets held for DMA channel 0 awaiting a descriptor |
ambaPort9internal.heldRxPkt1 |
temu::list::Buffer |
Packets held for DMA channel 1 awaiting a descriptor |
ambaPort9internal.heldRxPkt2 |
temu::list::Buffer |
Packets held for DMA channel 2 awaiting a descriptor |
ambaPort9internal.heldRxPkt3 |
temu::list::Buffer |
Packets held for DMA channel 3 awaiting a descriptor |
ambaPort9internal.heldRxType0 |
temu::list::U8 |
Packet type of each entry in heldRxPkt0 |
ambaPort9internal.heldRxType1 |
temu::list::U8 |
Packet type of each entry in heldRxPkt1 |
ambaPort9internal.heldRxType2 |
temu::list::U8 |
Packet type of each entry in heldRxPkt2 |
ambaPort9internal.heldRxType3 |
temu::list::U8 |
Packet type of each entry in heldRxPkt3 |
ambaPort9internal.rmapOutgoingReplyPkt |
temu::list::Buffer |
Queue of RMAP reply packets awaiting transmission |
ambaPort9internal.tcBusy |
uint8_t |
Set while a time code transmission is pending |
ambaPort9internal.txBusy |
uint8_t |
Set while a transmission is claimed by this port |
ambaPort9internal.txDAddr |
uint32_t |
Data address for the scheduled dma engine transfer |
ambaPort9internal.txDLength |
uint32_t |
Data length for the scheduled dma engine transfer |
ambaPort9internal.txFlags |
uint32_t |
Flags for the scheduled dma engine transfer |
ambaPort9internal.txHAddr |
uint32_t |
Header address for the scheduled dma engine transfer |
ambaPort9internal.txType |
uint8_t |
Scheduled transmission type (dma engine/rmap) |
ambaPort9regs.defaultAddr |
uint32_t |
Amba port default address registers |
ambaPort9regs.destKey |
uint32_t |
Amba port destination key registers |
ambaPort9regs.dmaChannelAddr |
[uint32_t; 4] |
Amba port dma channel address registers |
ambaPort9regs.dmaCtrl |
[uint32_t; 4] |
Amba port dma control registers |
ambaPort9regs.dmaRxDescTableAddr |
[uint32_t; 4] |
Amba port dma receive descriptor table address registers |
ambaPort9regs.dmaRxMaxLen |
[uint32_t; 4] |
Amba port dma receive max length registers |
ambaPort9regs.dmaTxDescTableAddr |
[uint32_t; 4] |
Amba port dma transfer descriptor table address registers |
ambaPort9regs.portCtrl |
uint32_t |
Amba ports control registers |
ambaPort9regs.portStatus |
uint32_t |
Amba port status registers |
ambaPort9regs.time |
uint32_t |
Amba port time registers |
config.adaptiveRouteToReadyPort |
uint8_t |
Group adaptive routing picks an AMBA port that can accept the packet and rotates between them, instead of always picking the lowest numbered port |
config.ahbCfgBaseAddr |
uint32_t |
Base address of the AHB configuration port |
config.ahbCfgEnabled |
uint8_t |
Ahb configuration port enabled |
config.ambaPortsNum |
uint8_t |
Number of AMBA ports |
config.fifoIf0.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf0.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf1.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf1.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf10.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf10.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf11.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf11.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf12.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf12.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf13.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf13.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf14.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf14.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf15.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf15.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf16.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf16.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf17.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf17.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf18.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf18.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf19.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf19.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf2.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf2.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf20.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf20.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf21.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf21.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf22.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf22.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf23.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf23.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf24.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf24.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf25.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf25.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf26.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf26.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf27.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf27.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf28.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf28.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf29.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf29.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf3.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf3.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf30.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf30.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf4.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf4.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf5.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf5.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf6.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf6.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf7.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf7.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf8.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf8.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoIf9.bridgesToPort |
uint8_t |
FIFO bridge mode pair port index of this port. This maps from a FIFO interface index to a port index, so the value to use depends on config.(spw |
amba |
fifo)PortsNum. |
config.fifoIf9.logPkts |
uint8_t |
Log packets transmitted or received by this port |
config.fifoPortsNum |
uint8_t |
Number of FiFo ports |
config.instanceId |
uint8_t |
Value of Instance-ID field in Version/InstanceId register |
config.logDiscards |
uint8_t |
Report every discarded packet, not just the first of each reason |
config.majorVersion |
uint8_t |
Value of major version field in Version/InstanceId register |
config.minorVersion |
uint8_t |
Value of minor version field in Version/InstanceId register |
config.patch |
uint8_t |
Value of patch field in Version/InstanceId register |
config.spwPortsNum |
uint8_t |
Number of SpaceWire ports |
config.staticRountingEnabled |
uint8_t |
Static routing enabled (deprecated spelling) |
config.staticRoutingEnabled |
uint8_t |
Static routing enabled |
fifoEndpoints |
[temu_IfaceRef; 31]/ <unknown> |
FIFO ports into this device. |
internal.adaptiveRouteCursor |
uint8_t |
Rotation cursor for group adaptive port selection |
internal.ahbConfigPort.pnp.bar |
[uint32_t; 4] |
Pnp BAR for the AHB configuration port |
internal.ahbConfigPort.pnp.ident |
uint32_t |
Pnp identification region word for the AHB configuration port |
internal.ahbConfigPort.pnp.user |
[uint32_t; 3] |
Pnp user defined words for the AHB configuration port |
internal.discardReported |
uint32_t |
Discard reasons already reported |
internal.spwSpwLinkState |
[int32_t; 31] |
Link state of the SpaceWire port |
regs.cfgWriteEnable |
uint32_t |
Configuration write enable register |
regs.incCharCount |
[uint32_t; 31] |
Incoming character count register |
regs.incPktCount |
[uint32_t; 31] |
Incoming packet count register |
regs.initDiv |
uint32_t |
Initialization divisor register |
regs.outCharCount |
[uint32_t; 31] |
Outgoing character count register |
regs.outPktCount |
[uint32_t; 31] |
Outgoing packet count register |
regs.portCtrl |
[uint32_t; 32] |
Port control registers for ports [0-31] |
regs.portCtrl2 |
[uint32_t; 32] |
Port control 2 registers for ports [0-31] |
regs.portSetup |
[uint32_t; 255] |
Port setup registers for ports [1-31] and logical addresses [32-255] |
regs.portStatus |
[uint32_t; 32] |
Port status registers for ports [0-31] |
regs.routerCfgSt |
uint32_t |
Router configuration/status register |
regs.routingTable |
[uint32_t; 223] |
Routing table entry registers for logical addresses [32-255] |
regs.timeCode |
uint32_t |
Time code register |
regs.timerPrescalerReload |
uint32_t |
Timer prescaler reload register |
regs.timerReload |
[uint32_t; 32] |
Timer reload registers for ports [0-31] |
regs.versionInstanceId |
uint32_t |
Version / Instance Id register |
spwPort0.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort0.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort1.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort1.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort10.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort10.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort11.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort11.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort12.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort12.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort13.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort13.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort14.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort14.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort15.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort15.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort16.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort16.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort17.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort17.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort18.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort18.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort19.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort19.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort2.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort2.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort20.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort20.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort21.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort21.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort22.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort22.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort23.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort23.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort24.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort24.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort25.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort25.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort26.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort26.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort27.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort27.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort28.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort28.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort29.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort29.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort3.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort3.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort30.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort30.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort31.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort31.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort4.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort4.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort5.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort5.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort6.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort6.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort7.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort7.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort8.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort8.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwPort9.config.logRxPkt |
uint8_t |
Log Packet received by the port |
spwPort9.config.logTxPkt |
uint8_t |
Log Packet transmitted from port |
spwUplink |
Interfaces
| Name | Type | Description |
|---|---|---|
DeviceIface |
DeviceIface |
Device interface |
RegisterIface |
temu::RegisterIface |
Auto-generated register interface |
ResetIface |
ResetIface |
Reset interface |
SpwPortIface |
SpwPortIface |
SpaceWire ports interfaces |
ahbConfigPortAhbIface |
AhbIface |
AHB configuration port AHB interface |
ahbConfigPortMemAccessIf |
MemAccessIface |
AHB configuration port memory access interface |
ambaPortApbIface |
ApbIface |
Apb interface |
ambaPortMemAccessIface |
MemAccessIface |
Amba port memory access interface |
fifoIfaces |
SpwPortIface |
FIFO ports out of this device. |