GRLIB IRQMP Model

The IrqMP is part of the GRLIB device library from Gaisler. It is a multiprocessor capable interrupt controller.

The controller supports routing interrupts to different processor cores and broadcasted interrupts.

Loading the Plugin

import IrqMp

Configuration

config.nCpu: Number of processors supported.
config.enExtIrq: Enable extended IRQs.
pnp.config: Plug and play configuration word for APB plug-and-play.
cpu: Up to 16 CPUs supported. IfaceRef property should be connected to the different CPUs.

@IrqMp Reference

Properties

Name	Type	Description
Class	*void	Class object
Component	*void	Pointer to component object if part of component
LocalName	*char	Local name (in component, if applicable)
LogMessageFlags	uint64_t	Per-object log message suppression flags
LoggingFlags	uint64_t	Flags for logging info
Name	*char	Object name
ObjectID	uint64_t	Unique ObjectID.
ReplayLoggingFlags	uint64_t	Replay-time category logging flags
TimeSource	*void	Time source object

Name

Type

Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name	Description
delete	Dispose instance of @IrqMp
new	Create new instance of IrqMp

Name

Description

delete

Dispose instance of @IrqMp

new

Create new instance of IrqMp

Command new Arguments

Name	Type	Required	Description
name	string	yes	Name of object to create

Name

Type

Required

Description

name

string

yes

Name of object to create

IrqMp Reference

Properties

Name	Type	Description
BRDCSTColdResetValue	uint32_t	Broadcast register
BRDCSTForcedBits	uint32_t	Broadcast register
BRDCSTForcedFlippedBits	uint32_t	Broadcast register
BRDCSTReadMask	uint32_t	Broadcast register
BRDCSTResetMask	uint32_t	Broadcast register
BRDCSTResetValue	uint32_t	Broadcast register
BRDCSTWriteMask	uint32_t	Broadcast register
Class	*void	Class object
Component	*void	Pointer to component object if part of component
ICLEARColdResetValue	uint32_t	Interrupt clear register
ICLEARForcedBits	uint32_t	Interrupt clear register
ICLEARForcedFlippedBits	uint32_t	Interrupt clear register
ICLEARReadMask	uint32_t	Interrupt clear register
ICLEARResetMask	uint32_t	Interrupt clear register
ICLEARResetValue	uint32_t	Interrupt clear register
ICLEARWriteMask	uint32_t	Interrupt clear register
IFORCEColdResetValue	uint32_t	Interrupt force register for processor 0
IFORCEForcedBits	uint32_t	Interrupt force register for processor 0
IFORCEForcedFlippedBits	uint32_t	Interrupt force register for processor 0
IFORCEReadMask	uint32_t	Interrupt force register for processor 0
IFORCEResetMask	uint32_t	Interrupt force register for processor 0
IFORCEResetValue	uint32_t	Interrupt force register for processor 0
IFORCEWriteMask	uint32_t	Interrupt force register for processor 0
ILEVELColdResetValue	uint32_t	Interrupt level register
ILEVELForcedBits	uint32_t	Interrupt level register
ILEVELForcedFlippedBits	uint32_t	Interrupt level register
ILEVELReadMask	uint32_t	Interrupt level register
ILEVELResetMask	uint32_t	Interrupt level register
ILEVELResetValue	uint32_t	Interrupt level register
ILEVELWriteMask	uint32_t	Interrupt level register
IPENDColdResetValue	uint32_t	Interrupt pending register
IPENDForcedBits	uint32_t	Interrupt pending register
IPENDForcedFlippedBits	uint32_t	Interrupt pending register
IPENDReadMask	uint32_t	Interrupt pending register
IPENDResetMask	uint32_t	Interrupt pending register
IPENDResetValue	uint32_t	Interrupt pending register
IPENDWriteMask	uint32_t	Interrupt pending register
LocalName	*char	Local name (in component, if applicable)
LogMessageFlags	uint64_t	Per-object log message suppression flags
LoggingFlags	uint64_t	Flags for logging info
MPSTATColdResetValue	uint32_t	Multiprocessor status register
MPSTATForcedBits	uint32_t	Multiprocessor status register
MPSTATForcedFlippedBits	uint32_t	Multiprocessor status register
MPSTATReadMask	uint32_t	Multiprocessor status register
MPSTATResetMask	uint32_t	Multiprocessor status register
MPSTATResetValue	uint32_t	Multiprocessor status register
MPSTATWriteMask	uint32_t	Multiprocessor status register
Name	*char	Object name
ObjectID	uint64_t	Unique ObjectID.
ReplayLoggingFlags	uint64_t	Replay-time category logging flags
TimeSource	*void	Time source object
bootAddress	[uint32_t; 16]	Processor boot address register
broadcast	uint32_t	Broadcast register
config.bootReg	uint8_t	Enable boot address registers
config.enExtIrq	uint8_t
config.irqMapping	uint8_t	Enable interrupt mapping
config.littleEndian	uint8_t	Endianess of memory interface.
config.logInterrupts	uint8_t
config.nCpu	uint8_t
config.traceReads	uint8_t
config.traceWrites	uint8_t
cpu	[temu_IfaceRef; 16]/ <unknown>	Processors
extIntAck	[uint32_t; 16]	Processor extended interrupt acknowledge register
force	[uint32_t; 16]	Processor interrupt force register
interruptMap	[uint32_t; 8]	Interrupt map register
irqClear	uint32_t	Interrupt clear register
irqCtrl	[temu_IfaceRef; 16]/ <unknown>	Upstream interrupt controllers (e.g. processor)
irqForce0	uint32_t	Interrupt force register for processor 0
irqLevel	uint32_t	Interrupt level register
irqPending	uint32_t	Interrupt pending register
irqSignalStatus	[uint16_t; 16]
mask	[uint32_t; 16]	Processor interrupt mask register
mpStatus	uint32_t	Multiprocessor status register
pnp.bar	uint32_t
pnp.config	uint32_t

Name

Type

Description

BRDCSTColdResetValue

uint32_t

Broadcast register

BRDCSTForcedBits

uint32_t

Broadcast register

BRDCSTForcedFlippedBits

uint32_t

Broadcast register

BRDCSTReadMask

uint32_t

Broadcast register

BRDCSTResetMask

uint32_t

Broadcast register

BRDCSTResetValue

uint32_t

Broadcast register

BRDCSTWriteMask

uint32_t

Broadcast register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

ICLEARColdResetValue

uint32_t

Interrupt clear register

ICLEARForcedBits

uint32_t

Interrupt clear register

ICLEARForcedFlippedBits

uint32_t

Interrupt clear register

ICLEARReadMask

uint32_t

Interrupt clear register

ICLEARResetMask

uint32_t

Interrupt clear register

ICLEARResetValue

uint32_t

Interrupt clear register

ICLEARWriteMask

uint32_t

Interrupt clear register

IFORCEColdResetValue

uint32_t

Interrupt force register for processor 0

IFORCEForcedBits

uint32_t

Interrupt force register for processor 0

IFORCEForcedFlippedBits

uint32_t

Interrupt force register for processor 0

IFORCEReadMask

uint32_t

Interrupt force register for processor 0

IFORCEResetMask

uint32_t

Interrupt force register for processor 0

IFORCEResetValue

uint32_t

Interrupt force register for processor 0

IFORCEWriteMask

uint32_t

Interrupt force register for processor 0

ILEVELColdResetValue

uint32_t

Interrupt level register

ILEVELForcedBits

uint32_t

Interrupt level register

ILEVELForcedFlippedBits

uint32_t

Interrupt level register

ILEVELReadMask

uint32_t

Interrupt level register

ILEVELResetMask

uint32_t

Interrupt level register

ILEVELResetValue

uint32_t

Interrupt level register

ILEVELWriteMask

uint32_t

Interrupt level register

IPENDColdResetValue

uint32_t

Interrupt pending register

IPENDForcedBits

uint32_t

Interrupt pending register

IPENDForcedFlippedBits

uint32_t

Interrupt pending register

IPENDReadMask

uint32_t

Interrupt pending register

IPENDResetMask

uint32_t

Interrupt pending register

IPENDResetValue

uint32_t

Interrupt pending register

IPENDWriteMask

uint32_t

Interrupt pending register

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

MPSTATColdResetValue

uint32_t

Multiprocessor status register

MPSTATForcedBits

uint32_t

Multiprocessor status register

MPSTATForcedFlippedBits

uint32_t

Multiprocessor status register

MPSTATReadMask

uint32_t

Multiprocessor status register

MPSTATResetMask

uint32_t

Multiprocessor status register

MPSTATResetValue

uint32_t

Multiprocessor status register

MPSTATWriteMask

uint32_t

Multiprocessor status register

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

bootAddress

[uint32_t; 16]

Processor boot address register

broadcast

uint32_t

Broadcast register

config.bootReg

uint8_t

Enable boot address registers

config.enExtIrq

uint8_t

config.irqMapping

uint8_t

Enable interrupt mapping

config.littleEndian

uint8_t

Endianess of memory interface.

config.logInterrupts

uint8_t

config.nCpu

uint8_t

config.traceReads

uint8_t

config.traceWrites

uint8_t

cpu

[temu_IfaceRef; 16]/ <unknown>

Processors

extIntAck

[uint32_t; 16]

Processor extended interrupt acknowledge register

force

[uint32_t; 16]

Processor interrupt force register

interruptMap

[uint32_t; 8]

Interrupt map register

irqClear

uint32_t

Interrupt clear register

irqCtrl

[temu_IfaceRef; 16]/ <unknown>

Upstream interrupt controllers (e.g. processor)

irqForce0

uint32_t

Interrupt force register for processor 0

irqLevel

uint32_t

Interrupt level register

irqPending

uint32_t

Interrupt pending register

irqSignalStatus

[uint16_t; 16]

mask

[uint32_t; 16]

Processor interrupt mask register

mpStatus

uint32_t

Multiprocessor status register

pnp.bar

uint32_t

pnp.config

uint32_t

Interfaces

Name	Type	Description
ApbIface	ApbIface
DeviceIface	DeviceIface
IrqClientIface	IrqClientIface	uptree interrupt handlers (e.g. CPUs)
IrqIface	IrqCtrlIface
MemAccessIface	MemAccessIface
RegisterIface	temu::RegisterIface	Auto-generated Register Interface Impl.
ResetIface	ResetIface

Name

Type

Description

ApbIface

DeviceIface

IrqClientIface

uptree interrupt handlers (e.g. CPUs)

IrqIface

IrqCtrlIface

MemAccessIface

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

ResetIface

Ports

Prop	Iface	Description
irqCtrl	IrqClientIface	irq port

Prop

Iface

Description

irqCtrl

IrqClientIface

irq port

Registers

Register Bank Regs

Register ILEVEL

Description: Interrupt level register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IL	`0x0000fffe`	`0x0`	Interrupt level

0x0000fffe

0x0

Interrupt level

Register IPEND

Description: Interrupt pending register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIP	`0xffff0000`	`0x0`	Extended interrupt pending
IP	`0x0000fffe`	`0x0`	Interrupt pending

EIP

0xffff0000

0x0

Extended interrupt pending

0x0000fffe

0x0

Interrupt pending

Register IFORCE

Description: Interrupt force register for processor 0
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IF	`0x0000fffe`	`0x0`	Interrupt force for processor 0

0x0000fffe

0x0

Interrupt force for processor 0

Register ICLEAR

Description: Interrupt clear register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIC	`0xffff0000`	`0x0`	Extended interrupt clear
IC	`0x0000fffe`	`0x0`	Interrupt clear

EIC

0xffff0000

0x0

Extended interrupt clear

0x0000fffe

0x0

Interrupt clear

Register MPSTAT

Description: Multiprocessor status register
Reset value: 0x00000000
Warm reset mask: 0xfc0fffff

Field Mask Reset Description

Field	Mask	Reset	Description
NCPU	`0xf0000000`	`0x0`	Number of CPUs minus one
BA	`0x08000000`	`0x0`	Broadcast available
ER	`0x04000000`	`0x0`	Extended boot registers available
EIRQ	`0x000f0000`	`0x0`	Extended IRQ
STATUS	`0x0000ffff`	`0x0`	Power-down status of CPU

NCPU

0xf0000000

0x0

Number of CPUs minus one

0x08000000

0x0

Broadcast available

0x04000000

0x0

Extended boot registers available

EIRQ

0x000f0000

0x0

Extended IRQ

STATUS

0x0000ffff

0x0

Power-down status of CPU

Register BRDCST

Description: Broadcast register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
BM	`0x0000fffe`	`0x0`	Broadcast mask

0x0000fffe

0x0

Broadcast mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIMASK

Description: Processor interrupt mask register
Reset value: 0x00000000
Warm reset mask: 0xfffffffe

Field Mask Reset Description

Field	Mask	Reset	Description
EIM	`0xffff0000`	`0x0`	Extended interrupt mask
IM	`0x0000fffe`	`0x0`	Interrupt mask

EIM

0xffff0000

0x0

Extended interrupt mask

0x0000fffe

0x0

Interrupt mask

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PIFORCE

Description: Processor interrupt force register
Reset value: 0x00000000
Warm reset mask: 0x0000fffe

Field Mask Reset Description

Field	Mask	Reset	Description
IFC	`0xfffe0000`	`-`	Interrupt force clear
IF	`0x0000fffe`	`0x0`	Interrupt force

IFC

0xfffe0000

-

Interrupt force clear

0x0000fffe

0x0

Interrupt force

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

Field	Mask	Reset	Description
EID	`0x0000001f`	`0x0`	Extended interrupt ID

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

Field	Mask	Reset	Description
EID	`0x0000001f`	`0x0`	Extended interrupt ID

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

Field	Mask	Reset	Description
EID	`0x0000001f`	`0x0`	Extended interrupt ID

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

Field	Mask	Reset	Description
EID	`0x0000001f`	`0x0`	Extended interrupt ID

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

Field	Mask	Reset	Description
EID	`0x0000001f`	`0x0`	Extended interrupt ID

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register PEXTACK

Description: Processor extended interrupt acknowledge register
Reset value: 0x00000000
Warm reset mask: 0x0000001f

Field Mask Reset Description

EID

0x0000001f

0x0

Extended interrupt ID

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register BADDR

Description: Processor boot address register
Reset value: 0x00000000
Warm reset mask: 0xfffffff9

Field Mask Reset Description

BOOTADDR

0xfffffff8

0x0

Processor boot address

0x00000001

0x0

Auto start

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Register IRQMAP

Description: Interrupt map register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

IRQMAP0

0xff000000

0x0

Interrupt map field n

IRQMAP1

0x00ff0000

0x0

Interrupt map field n+1

IRQMAP2

0x0000ff00

0x0

Interrupt map field n+2

IRQMAP3

0x000000ff

0x0

Interrupt map field n+3

Commands

Name

Description

delete

Dispose instance of IrqMp

raiseExternalIrq

Raise interrupt

Command raiseExternalIrq Arguments

Name

Type

Required

Description

irq

int

yes

Interrupt number

Limitations

The following deviations from real hardware are known to exist with this model:

Broadcasted interrupts are broadcasted at the current time to all CPUs. If it was triggered by a non-synchronized event, the interrupt is raised at different times on the different cores. Consider the IRQ frequency and the configured quanta length.