GRLIB IRQAMP Model
The IRQAMP is part of the GRLIB device library from Gaisler. It is a multiprocessor capable interrupt controller.
The controller supports among things the routing of interrupts to different processor cores, and also broadcasted interrupts.
The device supports the boot address registers.
@IRQAMP Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
IRQAMP Reference
Properties
| Name | Type | Description |
|---|---|---|
ASMPCTRL |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLColdResetValue |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLForcedBits |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLForcedFlippedBits |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLReadMask |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLResetMask |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLResetValue |
uint32_t |
Asymmetric multiprocessing control register |
ASMPCTRLWriteMask |
uint32_t |
Asymmetric multiprocessing control register |
BRDCSTColdResetValue |
uint32_t |
Broadcast register |
BRDCSTForcedBits |
uint32_t |
Broadcast register |
BRDCSTForcedFlippedBits |
uint32_t |
Broadcast register |
BRDCSTReadMask |
uint32_t |
Broadcast register |
BRDCSTResetMask |
uint32_t |
Broadcast register |
BRDCSTResetValue |
uint32_t |
Broadcast register |
BRDCSTWriteMask |
uint32_t |
Broadcast register |
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
ERRSTAT |
uint32_t |
Error mode status register |
ERRSTATColdResetValue |
uint32_t |
Error mode status register |
ERRSTATForcedBits |
uint32_t |
Error mode status register |
ERRSTATForcedFlippedBits |
uint32_t |
Error mode status register |
ERRSTATReadMask |
uint32_t |
Error mode status register |
ERRSTATResetMask |
uint32_t |
Error mode status register |
ERRSTATResetValue |
uint32_t |
Error mode status register |
ERRSTATWriteMask |
uint32_t |
Error mode status register |
ICLEARColdResetValue |
uint32_t |
Interrupt clear register |
ICLEARForcedBits |
uint32_t |
Interrupt clear register |
ICLEARForcedFlippedBits |
uint32_t |
Interrupt clear register |
ICLEARReadMask |
uint32_t |
Interrupt clear register |
ICLEARResetMask |
uint32_t |
Interrupt clear register |
ICLEARResetValue |
uint32_t |
Interrupt clear register |
ICLEARWriteMask |
uint32_t |
Interrupt clear register |
ICSELR |
[uint32_t; 2] |
Interrupt controller select register |
ILEVELColdResetValue |
uint32_t |
Interrupt level register |
ILEVELForcedBits |
uint32_t |
Interrupt level register |
ILEVELForcedFlippedBits |
uint32_t |
Interrupt level register |
ILEVELReadMask |
uint32_t |
Interrupt level register |
ILEVELResetMask |
uint32_t |
Interrupt level register |
ILEVELResetValue |
uint32_t |
Interrupt level register |
ILEVELWriteMask |
uint32_t |
Interrupt level register |
IPENDColdResetValue |
uint32_t |
Interrupt pending register |
IPENDForcedBits |
uint32_t |
Interrupt pending register |
IPENDForcedFlippedBits |
uint32_t |
Interrupt pending register |
IPENDReadMask |
uint32_t |
Interrupt pending register |
IPENDResetMask |
uint32_t |
Interrupt pending register |
IPENDResetValue |
uint32_t |
Interrupt pending register |
IPENDWriteMask |
uint32_t |
Interrupt pending register |
ITCNT |
[uint32_t; 16] |
Interrupt timestamp counter register |
ITSTAMPAC |
[uint32_t; 16] |
Interrupt acknowledge timestamp register |
ITSTAMPAS |
[uint32_t; 16] |
Interrupt assertion timestamp register |
ITSTMPC |
[uint32_t; 16] |
Interrupt timestamp control register |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
MPSTATColdResetValue |
uint32_t |
Multiprocessor status register |
MPSTATForcedBits |
uint32_t |
Multiprocessor status register |
MPSTATForcedFlippedBits |
uint32_t |
Multiprocessor status register |
MPSTATReadMask |
uint32_t |
Multiprocessor status register |
MPSTATResetMask |
uint32_t |
Multiprocessor status register |
MPSTATResetValue |
uint32_t |
Multiprocessor status register |
MPSTATWriteMask |
uint32_t |
Multiprocessor status register |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
PBOOT |
uint32_t |
Processor boot register |
PBOOTColdResetValue |
uint32_t |
Processor boot register |
PBOOTForcedBits |
uint32_t |
Processor boot register |
PBOOTForcedFlippedBits |
uint32_t |
Processor boot register |
PBOOTReadMask |
uint32_t |
Processor boot register |
PBOOTResetMask |
uint32_t |
Processor boot register |
PBOOTResetValue |
uint32_t |
Processor boot register |
PBOOTWriteMask |
uint32_t |
Processor boot register |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
acknowledgedInterrupts |
[uint64_t; 16] |
|
bootAddress |
[uint32_t; 16] |
Processor boot address register |
broadcast |
uint32_t |
Broadcast register |
config.bootReg |
uint8_t |
Enable boot address registers |
config.enExtIrq |
uint8_t |
|
config.experimentalDisableExtIrqBit |
uint8_t |
Disable setting the shared ext-irq bit when raising interrupts (deprecated) |
config.hasErrorModeStatusRegister |
uint8_t |
Enable error mode status register |
config.hasProcessorBootRegister |
uint8_t |
Enable processor boot register |
config.interruptLogMask |
uint64_t |
|
config.irqMapping |
uint8_t |
Enable interrupt mapping |
config.legacyCpuControlDisabled |
uint8_t |
|
config.littleEndian |
uint8_t |
Endianess of memory interface. |
config.logInterrupts |
uint8_t |
|
config.nCpu |
uint8_t |
|
config.numberOfTimeStamps |
uint8_t |
Number of timestamp registers |
config.traceReads |
uint8_t |
|
config.traceWrites |
uint8_t |
|
cpu |
[temu_IfaceRef; 16]/ <unknown> |
Processors |
dynamicReset |
[temu_IfaceRef; 16]/ <unknown> |
Dynamic reset address interface (typically implemented by CPU) |
extIntAck |
[uint32_t; 16] |
Processor extended interrupt acknowledge register |
force |
[uint32_t; 16] |
Processor interrupt force register |
interruptMap |
[uint32_t; 8] |
Interrupt map register |
irqClear |
uint32_t |
Interrupt clear register |
irqCtrl |
[temu_IfaceRef; 16]/ <unknown> |
Upstream interrupt controllers |
irqLevel |
uint32_t |
Interrupt level register |
irqPending |
uint32_t |
Interrupt pending register |
irqSignalStatus |
[uint16_t; 16] |
|
irqTimestampMap |
[uint32_t; 32] |
Auxiliary helper properties to map IRQ numbers to timestamp counters |
mask |
[uint32_t; 16] |
Processor interrupt mask register |
mpStatus |
uint32_t |
Multiprocessor status register |
pnp.bar |
uint32_t |
|
pnp.config |
uint32_t |
|
raisedInterrupts |
[uint64_t; 16] |
Interfaces
| Name | Type | Description |
|---|---|---|
ApbIface |
ApbIface |
|
DeviceIface |
DeviceIface |
|
IrqClientIface |
IrqClientIface |
uptree interrupt handlers (e.g. CPUs) |
IrqIface |
IrqCtrlIface |
|
LegacyDisableIface |
SignalIface |
Signal interface to toggle legacy mode. |
MemAccessIface |
MemAccessIface |
|
RegisterIface |
temu::RegisterIface |
Auto-generated Register Interface Impl. |
ResetIface |
ResetIface |
Registers
| Register support is currently experimental! |
Register Bank Regs
Register ILEVEL
- Description
-
Interrupt level register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IL |
|
|
Interrupt level |
Register IPEND
- Description
-
Interrupt pending register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIP |
|
|
Extended interrupt pending |
IP |
|
|
Interrupt pending |
Register IFORCE0
- Description
-
Interrupt force register for processor 0
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IF |
|
|
Interrupt force |
Register ICLEAR
- Description
-
Interrupt clear register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
EIC |
|
|
Extended interrupt clear |
IC |
|
|
Interrupt clear |
Register MPSTAT
- Description
-
Multiprocessor status register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfc0f000f
| Field | Mask | Reset | Description |
|---|---|---|---|
NCPU |
|
|
Number of CPUs minus one |
BA |
|
|
Broadcast available |
ER |
|
|
Extended boot registers available |
EIRQ |
|
|
Extended IRQ |
STATUS |
|
|
Power-down status of CPU |
Register BRDCST
- Description
-
Broadcast register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
BM |
|
|
Broadcast mask |
Register ERRSTAT
- Description
-
Error mode status register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000000f
| Field | Mask | Reset | Description |
|---|---|---|---|
ERRMODE |
|
|
Error mode status |
Register ASMPCTRL
- Description
-
Asymmetric multiprocessing control register
- Reset value
-
0x30000000
- Warm reset mask
-
0xf0000003
| Field | Mask | Reset | Description |
|---|---|---|---|
NCTRL |
|
|
Number of internal controllers |
ICF |
|
|
Inter-controller force |
L |
|
|
Lock |
Register PBOOT
- Description
-
Processor boot register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
RESET |
|
|
Reset processors |
BOOT |
|
|
Boot processors |
Register ICSELR
- Description
-
Interrupt controller select register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffff0000
| Field | Mask | Reset | Description |
|---|---|---|---|
ICSEL0 |
|
|
Interrupt controller select for processor n |
ICSEL1 |
|
|
Interrupt controller select for processor n+1 |
ICSEL2 |
|
|
Interrupt controller select for processor n+2 |
ICSEL3 |
|
|
Interrupt controller select for processor n+3 |
Register ICSELR
- Description
-
Interrupt controller select register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffff0000
| Field | Mask | Reset | Description |
|---|---|---|---|
ICSEL0 |
|
|
Interrupt controller select for processor n |
ICSEL1 |
|
|
Interrupt controller select for processor n+1 |
ICSEL2 |
|
|
Interrupt controller select for processor n+2 |
ICSEL3 |
|
|
Interrupt controller select for processor n+3 |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIMASK
- Description
-
Processor interrupt mask register
- Reset value
-
0x00000000
- Warm reset mask
-
0xfffffffe
| Field | Mask | Reset | Description |
|---|---|---|---|
EIM |
|
|
Extended interrupt mask |
IM |
|
|
Interrupt mask |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PIFORCE
- Description
-
Processor interrupt force register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000fffe
| Field | Mask | Reset | Description |
|---|---|---|---|
IFC |
|
|
Interrupt force clear |
IF |
|
|
Interrupt force |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register PEXTACK
- Description
-
Processor extended interrupt acknowledge register
- Reset value
-
0x00000000
- Warm reset mask
-
0x0000001f
| Field | Mask | Reset | Description |
|---|---|---|---|
EID |
|
|
Extended interrupt ID |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITCNT
- Description
-
Interrupt timestamp counter register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TCNT |
|
|
Timestamp counter |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTMPC
- Description
-
Interrupt timestamp control register
- Reset value
-
0x10000000
- Warm reset mask
-
0xf800003f
| Field | Mask | Reset | Description |
|---|---|---|---|
TSTAMP |
|
|
Number of timestamp register sets |
S1 |
|
|
Assertion stamped |
S2 |
|
|
Acknowledge stamped |
KS |
|
|
Keep stamp |
TSISEL |
|
|
Timestamp interrupt select |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAS
- Description
-
Interrupt assertion timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TASSERTION |
|
|
Timestamp of assertion |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register ITSTAMPAC
- Description
-
Interrupt acknowledge timestamp register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
TACKNOWLEDGE |
|
|
Timestamp of acknowledge |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register BADDR
- Description
-
Processor boot address register
- Reset value
-
0x00000000
- Warm reset mask
-
0x00000000
| Field | Mask | Reset | Description |
|---|---|---|---|
BOOTADDR |
|
|
Processor boot address |
AS |
|
|
Auto start |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Register IRQMAP
- Description
-
Interrupt map register
- Reset value
-
0x00000000
- Warm reset mask
-
0xffffffff
| Field | Mask | Reset | Description |
|---|---|---|---|
IRQMAP0 |
|
|
Interrupt map field n |
IRQMAP1 |
|
|
Interrupt map field n+1 |
IRQMAP2 |
|
|
Interrupt map field n+2 |
IRQMAP3 |
|
|
Interrupt map field n+3 |
Limitations
The following deviations from real hardware are known to exist with this model:
-
Broadcasted interrupts are broadcasted at the current time to all CPUs. If triggered by a non-synchronised event, the interrupt is raised at different times on the different cores. Depending on the IRQ frequency and the configured quanta length, this may result in problems for some software.
-
The model does not verify that register writes come from the correct CPU at the moment.