P2020 DMA Model

This section describes the P2020 DMA model.

The DMA controller transfers blocks of data between the interface and functional modules of this chip, independent of the cores or external hosts. It has four high-speed DMA channels. Both the cores and external devices can initiate DMA transfers.

The DMA module has two modes of operation: basic and extended. Basic mode is the DMA legacy mode, which does not support advanced features. Extended mode supports advanced features such as striding and flexible descriptor structures. These two basic modes allow users to initiate and end DMA transfers in various ways:

  • Direct mode: no descriptors are involved, software/user must initialize such required fields as source address and attributes and destination address and attributes.

  • Chaining mode: software must initialize descriptors in memory and such fields as link/list descriptor address before starting a transfer.

  • Single-write start mode: DMA process can be started using a single-write command to either the descriptor address register in one of the chaining modes or the source/destination address registers in one of the direct modes.

Loading the Plugin

import P2020

Configuration

The DMA programmable registers that occupy memory-mapped space are named according to P2020 QorIQ integrated processor reference manual. All 4 DMA channels have the same set of registers, so the register index is the channels id (from 0 to 3).

Setting registers via Command Line
# set source address for channel 3
dma.SAR[3] = 0x40000000
Setting registers via API
// set source address for channel 3
temu_writeValueU32(dma, "SAR", 0x40000000, 3);

@DMA Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @DMA

new

Create new instance of DMA

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

DMA Reference

Properties

Name Type Description

BCR

[uint32_t; 4]

DMA byte count register

CLNDAR

[uint32_t; 4]

DMA current link descriptor address register

CLSDAR

[uint32_t; 4]

DMA current list descriptor address register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

DAR

[uint32_t; 4]

DMA destination address register

DATR

[uint32_t; 4]

DMA destination attributes register

DGSR

uint32_t

DMA general status register

DGSRColdResetValue

uint32_t

DMA general status register

DGSRForcedBits

uint32_t

DMA general status register

DGSRForcedFlippedBits

uint32_t

DMA general status register

DGSRReadMask

uint32_t

DMA general status register

DGSRResetMask

uint32_t

DMA general status register

DGSRResetValue

uint32_t

DMA general status register

DGSRWriteMask

uint32_t

DMA general status register

DSR

[uint32_t; 4]

DMA destination stride register

ECLNDAR

[uint32_t; 4]

DMA current link descriptor extended address register

ECLSDAR

[uint32_t; 4]

DMA extended current list descriptor address register

ENLNDAR

[uint32_t; 4]

DMA extended next link descriptor address register

ENLSDAR

[uint32_t; 4]

DMA extended next list descriptor address register

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

MR

[uint32_t; 4]

DMA channel mode register

NLNDAR

[uint32_t; 4]

DMA next link descriptor address register

NLSDAR

[uint32_t; 4]

DMA next list descriptor address register

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

SAR

[uint32_t; 4]

DMA source address register

SATR

[uint32_t; 4]

DMA source attributes register

SR

[uint32_t; 4]

DMA channel status register

SSR

[uint32_t; 4]

DMA source stride register

TimeSource

*void

Time source object

config.interrupt

[uint8_t; 4]

DMA IRQ number for each channel

irqCtrl

temu_IfaceRef/ <unknown>

Interrupt controller

memAccess

temu_IfaceRef/ <unknown>

Memory access for DMA.

Interfaces

Name Type Description

DeviceIface

DeviceIface

Device Interface

MemAccessIface

MemAccessIface

Memory access interface.

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

ResetIface

ResetIface

Reset Interface

Registers

Register support is currently experimental!

Register Bank Regs

Register DGSR
Description

DMA general status register

Reset value

0x00000000

Warm reset mask

0xbfbfbfbf

Diagram
Field Mask Reset Description

TE0

0x80000000

0x0

Transfer error, channel 0

CH0

0x20000000

0x0

Channel halted, channel 0

PE0

0x10000000

0x0

Programming error, channel 0

EOLNI0

0x08000000

0x0

End-of-links interrupt, channel 0

CB0

0x04000000

0x0

Channel busy, channel 0

EOSI0

0x02000000

0x0

End-of-segment interrupt, channel 0

EOLSI0

0x01000000

0x0

End-of-list interrupt, channel 0

TE1

0x00800000

0x0

Transfer error, channel 1

CH1

0x00200000

0x0

Channel halted, channel 1

PE1

0x00100000

0x0

Programming error, channel 1

EOLNI1

0x00080000

0x0

End-of-links interrupt, channel 1

CB1

0x00040000

0x0

Channel busy, channel 1

EOSI1

0x00020000

0x0

End-of-segment interrupt, channel 1

EOLSI1

0x00010000

0x0

End-of-list interrupt, channel 1

TE2

0x00008000

0x0

Transfer error, channel 2

CH2

0x00002000

0x0

Channel halted, channel 2

PE2

0x00001000

0x0

Programming error, channel 2

EOLNI2

0x00000800

0x0

End-of-links interrupt, channel 2

CB2

0x00000400

0x0

Channel busy, channel 2

EOSI2

0x00000200

0x0

End-of-segment interrupt, channel 2

EOLSI2

0x00000100

0x0

End-of-list interrupt, channel 2

TE3

0x00000080

0x0

Transfer error, channel 3

CH3

0x00000020

0x0

Channel halted, channel 3

PE3

0x00000010

0x0

Programming error, channel 3

EOLNI3

0x00000008

0x0

End-of-links interrupt, channel 3

CB3

0x00000004

0x0

Channel busy, channel 3

EOSI3

0x00000002

0x0

End-of-segment interrupt, channel 3

EOLSI3

0x00000001

0x0

End-of-list interrupt, channel 3
Register MR
Description

DMA channel mode register

Reset value

0x08000000

Warm reset mask

0x0f27f7ff

Diagram
Field Mask Reset Description

BWC

0x0f000000

0x8

Bandwidth and pause control

EMP_EN

0x00200000

0x0

External master pause enable

EMS_EN

0x00040000

0x0

External master start enable

DAHTS

0x00030000

0x0

Destination address hold transfer size

SAHTS

0x0000c000

0x0

Source address hold transfer size

DAHE

0x00002000

0x0

Destination address hold enable

SAHE

0x00001000

0x0

Source address hold enable

SRW

0x00000400

0x0

Single register write start mode

EOSIE

0x00000200

0x0

End-of-segments interrupt enable

EOLNIE

0x00000100

0x0

End-of-links interrupt enable

EOLSIE

0x00000080

0x0

End-of-lists interrupt enable

EIE

0x00000040

0x0

Error interrupt enable

XFE

0x00000020

0x0

Extended features enable

CDSM_SWSM

0x00000010

0x0

Current descriptor or single-write start mode

CA

0x00000008

0x0

Channel abort

CTM

0x00000004

0x0

Channel transfer mode

CC

0x00000002

0x0

Channel continue

CS

0x00000001

0x0

Channel start
Register MR
Description

DMA channel mode register

Reset value

0x08000000

Warm reset mask

0x0f27f7ff

Diagram
Field Mask Reset Description

BWC

0x0f000000

0x8

Bandwidth and pause control

EMP_EN

0x00200000

0x0

External master pause enable

EMS_EN

0x00040000

0x0

External master start enable

DAHTS

0x00030000

0x0

Destination address hold transfer size

SAHTS

0x0000c000

0x0

Source address hold transfer size

DAHE

0x00002000

0x0

Destination address hold enable

SAHE

0x00001000

0x0

Source address hold enable

SRW

0x00000400

0x0

Single register write start mode

EOSIE

0x00000200

0x0

End-of-segments interrupt enable

EOLNIE

0x00000100

0x0

End-of-links interrupt enable

EOLSIE

0x00000080

0x0

End-of-lists interrupt enable

EIE

0x00000040

0x0

Error interrupt enable

XFE

0x00000020

0x0

Extended features enable

CDSM_SWSM

0x00000010

0x0

Current descriptor or single-write start mode

CA

0x00000008

0x0

Channel abort

CTM

0x00000004

0x0

Channel transfer mode

CC

0x00000002

0x0

Channel continue

CS

0x00000001

0x0

Channel start
Register MR
Description

DMA channel mode register

Reset value

0x08000000

Warm reset mask

0x0f27f7ff

Diagram
Field Mask Reset Description

BWC

0x0f000000

0x8

Bandwidth and pause control

EMP_EN

0x00200000

0x0

External master pause enable

EMS_EN

0x00040000

0x0

External master start enable

DAHTS

0x00030000

0x0

Destination address hold transfer size

SAHTS

0x0000c000

0x0

Source address hold transfer size

DAHE

0x00002000

0x0

Destination address hold enable

SAHE

0x00001000

0x0

Source address hold enable

SRW

0x00000400

0x0

Single register write start mode

EOSIE

0x00000200

0x0

End-of-segments interrupt enable

EOLNIE

0x00000100

0x0

End-of-links interrupt enable

EOLSIE

0x00000080

0x0

End-of-lists interrupt enable

EIE

0x00000040

0x0

Error interrupt enable

XFE

0x00000020

0x0

Extended features enable

CDSM_SWSM

0x00000010

0x0

Current descriptor or single-write start mode

CA

0x00000008

0x0

Channel abort

CTM

0x00000004

0x0

Channel transfer mode

CC

0x00000002

0x0

Channel continue

CS

0x00000001

0x0

Channel start
Register MR
Description

DMA channel mode register

Reset value

0x08000000

Warm reset mask

0x0f27f7ff

Diagram
Field Mask Reset Description

BWC

0x0f000000

0x8

Bandwidth and pause control

EMP_EN

0x00200000

0x0

External master pause enable

EMS_EN

0x00040000

0x0

External master start enable

DAHTS

0x00030000

0x0

Destination address hold transfer size

SAHTS

0x0000c000

0x0

Source address hold transfer size

DAHE

0x00002000

0x0

Destination address hold enable

SAHE

0x00001000

0x0

Source address hold enable

SRW

0x00000400

0x0

Single register write start mode

EOSIE

0x00000200

0x0

End-of-segments interrupt enable

EOLNIE

0x00000100

0x0

End-of-links interrupt enable

EOLSIE

0x00000080

0x0

End-of-lists interrupt enable

EIE

0x00000040

0x0

Error interrupt enable

XFE

0x00000020

0x0

Extended features enable

CDSM_SWSM

0x00000010

0x0

Current descriptor or single-write start mode

CA

0x00000008

0x0

Channel abort

CTM

0x00000004

0x0

Channel transfer mode

CC

0x00000002

0x0

Channel continue

CS

0x00000001

0x0

Channel start
Register SR
Description

DMA channel status register

Reset value

0x00000000

Warm reset mask

0x00000024

Diagram
Field Mask Reset Description

TE

0x00000080

-

Transfer error

CH

0x00000020

0x0

Channel halted

PE

0x00000010

-

Programming error

EOLNI

0x00000008

-

End-of-links interrupt

CB

0x00000004

0x0

Channel busy

EOSI

0x00000002

-

End-of-segment interrupt

EOLSI

0x00000001

-

End-of-list interrupt
Register SR
Description

DMA channel status register

Reset value

0x00000000

Warm reset mask

0x00000024

Diagram
Field Mask Reset Description

TE

0x00000080

-

Transfer error

CH

0x00000020

0x0

Channel halted

PE

0x00000010

-

Programming error

EOLNI

0x00000008

-

End-of-links interrupt

CB

0x00000004

0x0

Channel busy

EOSI

0x00000002

-

End-of-segment interrupt

EOLSI

0x00000001

-

End-of-list interrupt
Register SR
Description

DMA channel status register

Reset value

0x00000000

Warm reset mask

0x00000024

Diagram
Field Mask Reset Description

TE

0x00000080

-

Transfer error

CH

0x00000020

0x0

Channel halted

PE

0x00000010

-

Programming error

EOLNI

0x00000008

-

End-of-links interrupt

CB

0x00000004

0x0

Channel busy

EOSI

0x00000002

-

End-of-segment interrupt

EOLSI

0x00000001

-

End-of-list interrupt
Register SR
Description

DMA channel status register

Reset value

0x00000000

Warm reset mask

0x00000024

Diagram
Field Mask Reset Description

TE

0x00000080

-

Transfer error

CH

0x00000020

0x0

Channel halted

PE

0x00000010

-

Programming error

EOLNI

0x00000008

-

End-of-links interrupt

CB

0x00000004

0x0

Channel busy

EOSI

0x00000002

-

End-of-segment interrupt

EOLSI

0x00000001

-

End-of-list interrupt
Register ECLNDAR
Description

DMA current link descriptor extended address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLNDA

0x0000000f

0x0

Current link descriptor extended address
Register ECLNDAR
Description

DMA current link descriptor extended address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLNDA

0x0000000f

0x0

Current link descriptor extended address
Register ECLNDAR
Description

DMA current link descriptor extended address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLNDA

0x0000000f

0x0

Current link descriptor extended address
Register ECLNDAR
Description

DMA current link descriptor extended address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLNDA

0x0000000f

0x0

Current link descriptor extended address
Register CLNDAR
Description

DMA current link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe8

Diagram
Field Mask Reset Description

CLNDA

0xffffffe0

0x0

Current link descriptor address

EOSIE

0x00000008

0x0

End-of-segment interrupt enable
Register CLNDAR
Description

DMA current link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe8

Diagram
Field Mask Reset Description

CLNDA

0xffffffe0

0x0

Current link descriptor address

EOSIE

0x00000008

0x0

End-of-segment interrupt enable
Register CLNDAR
Description

DMA current link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe8

Diagram
Field Mask Reset Description

CLNDA

0xffffffe0

0x0

Current link descriptor address

EOSIE

0x00000008

0x0

End-of-segment interrupt enable
Register CLNDAR
Description

DMA current link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe8

Diagram
Field Mask Reset Description

CLNDA

0xffffffe0

0x0

Current link descriptor address

EOSIE

0x00000008

0x0

End-of-segment interrupt enable
Register SATR
Description

DMA source attributes register

Reset value

0x00000000

Warm reset mask

0x010f0000

Diagram
Field Mask Reset Description

SSME

0x01000000

0x0

Source stride mode enable

SREADTTYPE

0x000f0000

0x0

DMA source transaction type
Register SATR
Description

DMA source attributes register

Reset value

0x00000000

Warm reset mask

0x010f0000

Diagram
Field Mask Reset Description

SSME

0x01000000

0x0

Source stride mode enable

SREADTTYPE

0x000f0000

0x0

DMA source transaction type
Register SATR
Description

DMA source attributes register

Reset value

0x00000000

Warm reset mask

0x010f0000

Diagram
Field Mask Reset Description

SSME

0x01000000

0x0

Source stride mode enable

SREADTTYPE

0x000f0000

0x0

DMA source transaction type
Register SATR
Description

DMA source attributes register

Reset value

0x00000000

Warm reset mask

0x010f0000

Diagram
Field Mask Reset Description

SSME

0x01000000

0x0

Source stride mode enable

SREADTTYPE

0x000f0000

0x0

DMA source transaction type
Register SAR
Description

DMA source address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SAD

0xffffffff

0x0

Source address
Register SAR
Description

DMA source address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SAD

0xffffffff

0x0

Source address
Register SAR
Description

DMA source address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SAD

0xffffffff

0x0

Source address
Register SAR
Description

DMA source address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SAD

0xffffffff

0x0

Source address
Register DATR
Description

DMA destination attributes register

Reset value

0x00000000

Warm reset mask

0x410f0000

Diagram
Field Mask Reset Description

NLWR

0x40000000

0x0

No last write with response

DSME

0x01000000

0x0

Destination stride mode enable

DWRITETTYPE

0x000f0000

0x0

DMA destination transaction type
Register DATR
Description

DMA destination attributes register

Reset value

0x00000000

Warm reset mask

0x410f0000

Diagram
Field Mask Reset Description

NLWR

0x40000000

0x0

No last write with response

DSME

0x01000000

0x0

Destination stride mode enable

DWRITETTYPE

0x000f0000

0x0

DMA destination transaction type
Register DATR
Description

DMA destination attributes register

Reset value

0x00000000

Warm reset mask

0x410f0000

Diagram
Field Mask Reset Description

NLWR

0x40000000

0x0

No last write with response

DSME

0x01000000

0x0

Destination stride mode enable

DWRITETTYPE

0x000f0000

0x0

DMA destination transaction type
Register DATR
Description

DMA destination attributes register

Reset value

0x00000000

Warm reset mask

0x410f0000

Diagram
Field Mask Reset Description

NLWR

0x40000000

0x0

No last write with response

DSME

0x01000000

0x0

Destination stride mode enable

DWRITETTYPE

0x000f0000

0x0

DMA destination transaction type
Register DAR
Description

DMA destination address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

DAD

0xffffffff

0x0

Destination address
Register DAR
Description

DMA destination address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

DAD

0xffffffff

0x0

Destination address
Register DAR
Description

DMA destination address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

DAD

0xffffffff

0x0

Destination address
Register DAR
Description

DMA destination address register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

DAD

0xffffffff

0x0

Destination address
Register BCR
Description

DMA byte count register

Reset value

0x00000000

Warm reset mask

0x03ffffff

Diagram
Field Mask Reset Description

BC

0x03ffffff

0x0

Byte count
Register BCR
Description

DMA byte count register

Reset value

0x00000000

Warm reset mask

0x03ffffff

Diagram
Field Mask Reset Description

BC

0x03ffffff

0x0

Byte count
Register BCR
Description

DMA byte count register

Reset value

0x00000000

Warm reset mask

0x03ffffff

Diagram
Field Mask Reset Description

BC

0x03ffffff

0x0

Byte count
Register BCR
Description

DMA byte count register

Reset value

0x00000000

Warm reset mask

0x03ffffff

Diagram
Field Mask Reset Description

BC

0x03ffffff

0x0

Byte count
Register ENLNDAR
Description

DMA extended next link descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLNDA

0x0000000f

0x0

Next link descriptor extended address
Register ENLNDAR
Description

DMA extended next link descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLNDA

0x0000000f

0x0

Next link descriptor extended address
Register ENLNDAR
Description

DMA extended next link descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLNDA

0x0000000f

0x0

Next link descriptor extended address
Register ENLNDAR
Description

DMA extended next link descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLNDA

0x0000000f

0x0

Next link descriptor extended address
Register NLNDAR
Description

DMA next link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe9

Diagram
Field Mask Reset Description

NLNDA

0xffffffe0

0x0

Next link descriptor address

NDEOSIE

0x00000008

0x0

Next descriptor end-of-segment interrupt enable

EOLND

0x00000001

0x0

End-of-links descriptor
Register NLNDAR
Description

DMA next link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe9

Diagram
Field Mask Reset Description

NLNDA

0xffffffe0

0x0

Next link descriptor address

NDEOSIE

0x00000008

0x0

Next descriptor end-of-segment interrupt enable

EOLND

0x00000001

0x0

End-of-links descriptor
Register NLNDAR
Description

DMA next link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe9

Diagram
Field Mask Reset Description

NLNDA

0xffffffe0

0x0

Next link descriptor address

NDEOSIE

0x00000008

0x0

Next descriptor end-of-segment interrupt enable

EOLND

0x00000001

0x0

End-of-links descriptor
Register NLNDAR
Description

DMA next link descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe9

Diagram
Field Mask Reset Description

NLNDA

0xffffffe0

0x0

Next link descriptor address

NDEOSIE

0x00000008

0x0

Next descriptor end-of-segment interrupt enable

EOLND

0x00000001

0x0

End-of-links descriptor
Register ECLSDAR
Description

DMA extended current list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLSDA

0x0000000f

0x0

Current list descriptor extended address
Register ECLSDAR
Description

DMA extended current list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLSDA

0x0000000f

0x0

Current list descriptor extended address
Register ECLSDAR
Description

DMA extended current list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLSDA

0x0000000f

0x0

Current list descriptor extended address
Register ECLSDAR
Description

DMA extended current list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ECLSDA

0x0000000f

0x0

Current list descriptor extended address
Register CLSDAR
Description

DMA current list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe0

Diagram
Field Mask Reset Description

CLSDA

0xffffffe0

0x0

Current list descriptor address
Register CLSDAR
Description

DMA current list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe0

Diagram
Field Mask Reset Description

CLSDA

0xffffffe0

0x0

Current list descriptor address
Register CLSDAR
Description

DMA current list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe0

Diagram
Field Mask Reset Description

CLSDA

0xffffffe0

0x0

Current list descriptor address
Register CLSDAR
Description

DMA current list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe0

Diagram
Field Mask Reset Description

CLSDA

0xffffffe0

0x0

Current list descriptor address
Register ENLSDAR
Description

DMA extended next list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLSDA

0x0000000f

0x0

Next list descriptor extended address
Register ENLSDAR
Description

DMA extended next list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLSDA

0x0000000f

0x0

Next list descriptor extended address
Register ENLSDAR
Description

DMA extended next list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLSDA

0x0000000f

0x0

Next list descriptor extended address
Register ENLSDAR
Description

DMA extended next list descriptor address register

Reset value

0x00000000

Warm reset mask

0x0000000f

Diagram
Field Mask Reset Description

ENLSDA

0x0000000f

0x0

Next list descriptor extended address
Register NLSDAR
Description

DMA next list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe1

Diagram
Field Mask Reset Description

NLSDA

0xffffffe0

0x0

Next list descriptor address

EOLSD

0x00000001

0x0

End-of-lists descriptor
Register NLSDAR
Description

DMA next list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe1

Diagram
Field Mask Reset Description

NLSDA

0xffffffe0

0x0

Next list descriptor address

EOLSD

0x00000001

0x0

End-of-lists descriptor
Register NLSDAR
Description

DMA next list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe1

Diagram
Field Mask Reset Description

NLSDA

0xffffffe0

0x0

Next list descriptor address

EOLSD

0x00000001

0x0

End-of-lists descriptor
Register NLSDAR
Description

DMA next list descriptor address register

Reset value

0x00000000

Warm reset mask

0xffffffe1

Diagram
Field Mask Reset Description

NLSDA

0xffffffe0

0x0

Next list descriptor address

EOLSD

0x00000001

0x0

End-of-lists descriptor
Register SSR
Description

DMA source stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

SSS

0x00fff000

0x0

Source stride size

SSD

0x00000fff

0x0

Source stride distance
Register SSR
Description

DMA source stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

SSS

0x00fff000

0x0

Source stride size

SSD

0x00000fff

0x0

Source stride distance
Register SSR
Description

DMA source stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

SSS

0x00fff000

0x0

Source stride size

SSD

0x00000fff

0x0

Source stride distance
Register SSR
Description

DMA source stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

SSS

0x00fff000

0x0

Source stride size

SSD

0x00000fff

0x0

Source stride distance
Register DSR
Description

DMA destination stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

DSS

0x00fff000

0x0

Destination stride size

DSD

0x00000fff

0x0

Destination stride distance
Register DSR
Description

DMA destination stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

DSS

0x00fff000

0x0

Destination stride size

DSD

0x00000fff

0x0

Destination stride distance
Register DSR
Description

DMA destination stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

DSS

0x00fff000

0x0

Destination stride size

DSD

0x00000fff

0x0

Destination stride distance
Register DSR
Description

DMA destination stride register

Reset value

0x00000000

Warm reset mask

0x00ffffff

Diagram
Field Mask Reset Description

DSS

0x00fff000

0x0

Destination stride size

DSD

0x00000fff

0x0

Destination stride distance

Commands

Name Description

delete

Dispose instance of DMA

Limitations

None