GRLIB FTMCTRL Model
The FtmCtrl device is part of the GRLIB IP library.
It is available in libTEMUFtmCtrl.so.
@FtmCtrl Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
FtmCtrl Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
MCFG1ColdResetValue |
uint32_t |
Memory configuration register 1 |
MCFG1ForcedBits |
uint32_t |
Memory configuration register 1 |
MCFG1ForcedFlippedBits |
uint32_t |
Memory configuration register 1 |
MCFG1ReadMask |
uint32_t |
Memory configuration register 1 |
MCFG1ResetMask |
uint32_t |
Memory configuration register 1 |
MCFG1ResetValue |
uint32_t |
Memory configuration register 1 |
MCFG1WriteMask |
uint32_t |
Memory configuration register 1 |
MCFG2ColdResetValue |
uint32_t |
Memory configuration register 2 |
MCFG2ForcedBits |
uint32_t |
Memory configuration register 2 |
MCFG2ForcedFlippedBits |
uint32_t |
Memory configuration register 2 |
MCFG2ReadMask |
uint32_t |
Memory configuration register 2 |
MCFG2ResetMask |
uint32_t |
Memory configuration register 2 |
MCFG2ResetValue |
uint32_t |
Memory configuration register 2 |
MCFG2WriteMask |
uint32_t |
Memory configuration register 2 |
MCFG3ColdResetValue |
uint32_t |
Memory configuration register 3 |
MCFG3ForcedBits |
uint32_t |
Memory configuration register 3 |
MCFG3ForcedFlippedBits |
uint32_t |
Memory configuration register 3 |
MCFG3ReadMask |
uint32_t |
Memory configuration register 3 |
MCFG3ResetMask |
uint32_t |
Memory configuration register 3 |
MCFG3ResetValue |
uint32_t |
Memory configuration register 3 |
MCFG3WriteMask |
uint32_t |
Memory configuration register 3 |
MCFG4ColdResetValue |
uint32_t |
Memory configuration register4 |
MCFG4ForcedBits |
uint32_t |
Memory configuration register4 |
MCFG4ForcedFlippedBits |
uint32_t |
Memory configuration register4 |
MCFG4ReadMask |
uint32_t |
Memory configuration register4 |
MCFG4ResetMask |
uint32_t |
Memory configuration register4 |
MCFG4ResetValue |
uint32_t |
Memory configuration register4 |
MCFG4WriteMask |
uint32_t |
Memory configuration register4 |
MCFG5ColdResetValue |
uint32_t |
Memory configuration register 5 |
MCFG5ForcedBits |
uint32_t |
Memory configuration register 5 |
MCFG5ForcedFlippedBits |
uint32_t |
Memory configuration register 5 |
MCFG5ReadMask |
uint32_t |
Memory configuration register 5 |
MCFG5ResetMask |
uint32_t |
Memory configuration register 5 |
MCFG5ResetValue |
uint32_t |
Memory configuration register 5 |
MCFG5WriteMask |
uint32_t |
Memory configuration register 5 |
MCFG6ColdResetValue |
uint32_t |
Memory configuration register6 |
MCFG6ForcedBits |
uint32_t |
Memory configuration register6 |
MCFG6ForcedFlippedBits |
uint32_t |
Memory configuration register6 |
MCFG6ReadMask |
uint32_t |
Memory configuration register6 |
MCFG6ResetMask |
uint32_t |
Memory configuration register6 |
MCFG6ResetValue |
uint32_t |
Memory configuration register6 |
MCFG6WriteMask |
uint32_t |
Memory configuration register6 |
MCFG7ColdResetValue |
uint32_t |
Memory configuration register 7 |
MCFG7ForcedBits |
uint32_t |
Memory configuration register 7 |
MCFG7ForcedFlippedBits |
uint32_t |
Memory configuration register 7 |
MCFG7ReadMask |
uint32_t |
Memory configuration register 7 |
MCFG7ResetMask |
uint32_t |
Memory configuration register 7 |
MCFG7ResetValue |
uint32_t |
Memory configuration register 7 |
MCFG7WriteMask |
uint32_t |
Memory configuration register 7 |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
ahb.pnp.bar |
[uint32_t; 4] |
|
ahb.pnp.identReg |
uint32_t |
|
ahb.pnp.userDef |
[uint32_t; 3] |
|
apb.pnp.bar |
uint32_t |
|
apb.pnp.config |
uint32_t |
|
config.littleEndian |
uint8_t |
Endianess of memory interface. |
mcfg1 |
uint32_t |
Memory configuration register 1 |
mcfg2 |
uint32_t |
Memory configuration register 2 |
mcfg3 |
uint32_t |
Memory configuration register 3 |
mcfg4 |
uint32_t |
Memory configuration register4 |
mcfg5 |
uint32_t |
Memory configuration register 5 |
mcfg6 |
uint32_t |
Memory configuration register6 |
mcfg7 |
uint32_t |
Memory configuration register 7 |
memorySpace |
temu_IfaceRef/ <unknown> |
Memory space. |
statCorrectable |
temu_IfaceRef/ <unknown> |
Statistics device for correctable/upset statistics. |
statUncorrectable |
temu_IfaceRef/ <unknown> |
Statistics device for uncorrectable/faulty statistics. |
Interfaces
| Name | Type | Description |
|---|---|---|
AhbIface |
AhbIface |
|
ApbIface |
ApbIface |
|
CorrectableErrorIface |
MemAccessIface |
|
DeviceIface |
DeviceIface |
|
MemAccessIface |
MemAccessIface |
|
RegisterIface |
temu::RegisterIface |
Auto-generated Register Interface Impl. |
ResetIface |
ResetIface |
|
UncorrectableErrorIface |
MemAccessIface |
Registers
| Register support is currently experimental! |
Register Bank Regs
Register MCFG1
- Description
-
Memory configuration register 1
- Reset value
-
0x000000ff
- Warm reset mask
-
0x66fbcbff
| Field | Mask | Reset | Description |
|---|---|---|---|
PBRDY |
|
|
PROM area bus ready enable |
ABRDY |
|
|
Asynchronous bus ready |
IOBUSW |
|
|
I/O bus width |
IBRDY |
|
|
I/O bus ready enable |
BEXCN |
|
|
Bus error enable |
IO_WAITSTATES |
|
|
I/O waitstates |
IOEN |
|
|
I/O enable |
ROMBANKSZ |
|
|
PROM bank size |
PWEN |
|
|
PROM write enable |
PROM_WIDTH |
|
|
PROM width |
PROM_WRITE_WS |
|
|
PROM write waitstates |
PROM_READ_WS |
|
|
PROM read waitstates |
Register MCFG2
- Description
-
Memory configuration register 2
- Reset value
-
0x58400000
- Warm reset mask
-
0xfffe600f
| Field | Mask | Reset | Description |
|---|---|---|---|
SDRF |
|
|
Enable SDRAM refresh |
TRP |
|
|
SDRAM TRP parameter |
SDRAM_TRFC |
|
|
SDRAM TRFC parameter |
TCAS |
|
|
Enable SDRAM refresh |
SDRAM_BANKSZ |
|
|
SDRAM bank size |
SDRAM_COLSZ |
|
|
SDRAM column size |
SDRAM_CMD |
|
|
SDRAM command |
D64 |
|
|
64-bit SDRAM data bus |
SDPB |
|
|
SDPB |
SE |
|
|
SDRAM enable |
SI |
|
|
SRAM disable |
RAM_BANK_SIZE |
|
|
RAM bank size |
RBRDY |
|
|
RAM bus ready enable |
RMW |
|
|
Read-modify-write enable |
RAM_WIDTH |
|
|
RAM width |
RAM_WRITE_WS |
|
|
RAM write waitstates |
RAM_READ_WS |
|
|
RAM read waitstates |
Register MCFG3
- Description
-
Memory configuration register 3
- Reset value
-
0x18000000
- Warm reset mask
-
0x1ffffcff
| Field | Mask | Reset | Description |
|---|---|---|---|
RSE |
|
|
Reed-Solomon EDAC enable |
ME |
|
|
Memory EDAC present |
SDRAM_REFRESH_COUNTER |
|
|
SDRAM refresh counter reload value |
WB |
|
|
EDAC diagnostic write bypass |
RB |
|
|
EDAC diagnostic read bypass |
PE |
|
|
PROM EDAC enable |
TCB |
|
|
Test checkbits |
Register MCFG4
- Description
-
Memory configuration register4
- Reset value
-
0x00000000
- Warm reset mask
-
0x0001ffff
| Field | Mask | Reset | Description |
|---|---|---|---|
WB |
|
|
EDAC diagnostic write bypass |
TCB |
|
|
Test checkbits |
Register MCFG5
- Description
-
Memory configuration register 5
- Reset value
-
0x00000000
- Warm reset mask
-
0x3f803f80
| Field | Mask | Reset | Description |
|---|---|---|---|
IOHWS |
|
|
I/O lead out cycles |
ROMHWS |
|
|
ROM lead out cycles |
