GRLIB APBUART Model

The ApbUart model is available in the ApbUart plugin. That plugin is part of the GRLIB device library feature. The ApbUart model supports both FIFO simualtion and infinite speed UARTs. In infinite speed mode bytes are sent directly when they are written to the data register.

Loading the Plugin

import ApbUart

@ApbUart Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @ApbUart

new

Create new instance of ApbUart
Command new Arguments
Name Type Required Description

name

string

yes

Name of object to create

ApbUart Reference

Properties

Name Type Description

CTRLColdResetValue

uint32_t

UART control register

CTRLForcedBits

uint32_t

UART control register

CTRLForcedFlippedBits

uint32_t

UART control register

CTRLReadMask

uint32_t

UART control register

CTRLResetMask

uint32_t

UART control register

CTRLResetValue

uint32_t

UART control register

CTRLWriteMask

uint32_t

UART control register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

DATAColdResetValue

uint32_t

UART data register

DATAForcedBits

uint32_t

UART data register

DATAForcedFlippedBits

uint32_t

UART data register

DATAReadMask

uint32_t

UART data register

DATAResetMask

uint32_t

UART data register

DATAResetValue

uint32_t

UART data register

DATAWriteMask

uint32_t

UART data register

DEBUG

uint32_t

UART FIFO debug register

DEBUGColdResetValue

uint32_t

UART FIFO debug register

DEBUGForcedBits

uint32_t

UART FIFO debug register

DEBUGForcedFlippedBits

uint32_t

UART FIFO debug register

DEBUGReadMask

uint32_t

UART FIFO debug register

DEBUGResetMask

uint32_t

UART FIFO debug register

DEBUGResetValue

uint32_t

UART FIFO debug register

DEBUGWriteMask

uint32_t

UART FIFO debug register

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

SCALERColdResetValue

uint32_t

UART scaler reload register

SCALERForcedBits

uint32_t

UART scaler reload register

SCALERForcedFlippedBits

uint32_t

UART scaler reload register

SCALERReadMask

uint32_t

UART scaler reload register

SCALERResetMask

uint32_t

UART scaler reload register

SCALERResetValue

uint32_t

UART scaler reload register

SCALERWriteMask

uint32_t

UART scaler reload register

STATColdResetValue

uint32_t

UART status register

STATForcedBits

uint32_t

UART status register

STATForcedFlippedBits

uint32_t

UART status register

STATReadMask

uint32_t

UART status register

STATResetMask

uint32_t

UART status register

STATResetValue

uint32_t

UART status register

STATWriteMask

uint32_t

UART status register

TimeSource

*void

Time source object

config.clockDivider

uint32_t

Clock divider

config.fifoSize

uint8_t

UART FIFO size

config.infiniteUartSpeed

uint8_t

Set to 1 to enable immediate UARTs

config.interrupt

uint8_t

Interrupt number

config.littleEndian

uint8_t

Endianess of memory interface.

control

uint32_t

UART control register

data

uint32_t

UART data register

irqCtrl

temu_IfaceRef/ <unknown>

Interrupt controller.

pnp.bar

uint32_t

AMBA plug and play base address register

pnp.config

uint32_t

AMBA plug and play config word

rxFifo.data

[uint8_t; 32]

RX FIFO data

rxFifo.size

uint8_t

RX size

rxFifo.start

uint8_t

RX start index

rxFifo.usage

uint8_t

RX usage

scaler

uint32_t

UART scaler reload register

status

uint32_t

UART status register

tx

temu_IfaceRef/ <unknown>

Transmit target.

txFifo.data

[uint8_t; 32]

TX FIFO data

txFifo.size

uint8_t

TX size

txFifo.start

uint8_t

TX start index

txFifo.usage

uint8_t

TX usage

txShift

uint8_t

UART shift register

Interfaces

Name Type Description

ApbIface

ApbIface

AMBA plug and play interface.

DeviceIface

DeviceIface

Device interface.

MemAccessIface

MemAccessIface

Memory access interface.

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

ResetIface

ResetIface

Reset interface.

UartIface

SerialIface

Serial input interface.

Ports

Prop Iface Description

tx

UartIface

serial port

Registers

Register support is currently experimental!
Register Bank Regs
Register DATA
Description

UART data register

Reset value

0x00000000

Warm reset mask

0x000000ff

Diagram
Field Mask Reset Description

DATA

0x000000ff

0x0

Receiver/Transmitter holding register or FIFO
Register STAT
Description

UART status register

Reset value

0x00000006

Warm reset mask

0xfff007ff

Diagram
Field Mask Reset Description

RCNT

0xfc000000

0x0

Receiver FIFO count

TCNT

0x03f00000

0x0

Transmitter FIFO count

RF

0x00000400

0x0

Receiver FIFO full

TF

0x00000200

0x0

Transmitter FIFO full

RH

0x00000100

0x0

Receiver FIFO half-full

TH

0x00000080

0x0

Transmitter FIFO half-full

FE

0x00000040

0x0

Framing error

PE

0x00000020

0x0

Parity error

OV

0x00000010

0x0

Overrun

BR

0x00000008

0x0

Break received

TE

0x00000004

0x1

Transmitter FIFO empty

TS

0x00000002

0x1

Transmitter shift register empty

DR

0x00000001

0x0

Data Ready
Register CTRL
Description

UART control register

Reset value

0x00000000

Warm reset mask

0x8000ffff

Diagram
Field Mask Reset Description

FA

0x80000000

0x0

FIFOs available

NS

0x00008000

0x0

Number of stop bits

SI

0x00004000

0x0

Transmitter shift register empty interrupt enable

DI

0x00002000

0x0

Delayed interrupt enable

BI

0x00001000

0x0

Break interrupt enable

DB

0x00000800

0x0

FIFO debug mode enable

RF

0x00000400

0x0

Receiver FIFO interrupt enable

TF

0x00000200

0x0

Transmitter FIFO interrupt enable

EC

0x00000100

0x0

External clock

LB

0x00000080

0x0

Loop back

FL

0x00000040

0x0

Flow control

PE

0x00000020

0x0

Parity enable

PS

0x00000010

0x0

Parity select

TI

0x00000008

0x0

Transmitter interrupt enable

RI

0x00000004

0x0

Receiver interrupt enable

TE

0x00000002

0x0

Transmitter enable

RE

0x00000001

0x0

Receiver enable
Register SCALER
Description

UART scaler reload register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SCALER

0xffffffff

0x0

Scaler reload value
Register DEBUG
Description

UART FIFO debug register

Reset value

0x00000000

Warm reset mask

0x000000ff

Diagram
Field Mask Reset Description

DATA

0x000000ff

0x0

Receiver/Transmitter holding register or FIFO

Commands

Name Description

delete

Dispose instance of ApbUart

enable-rx

Enable receiver

enable-tx

Enable transmitter

Limitations

  • Loop back mode is not presently supported.

  • Control flow (cts) is not supported.