GRLIB L2CACHE Model

The GrlibL2Cache device is part of the GRLIB IP library. It is available in libTEMUGrlibL2Cache.so.

Loading the Plugin

import GrlibL2Cache

Configuration

@GrlibL2Cache Reference

Properties

Name	Type	Description
Class	*void	Class object
Component	*void	Pointer to component object if part of component
LocalName	*char	Local name (in component, if applicable)
LogMessageFlags	uint64_t	Per-object log message suppression flags
LoggingFlags	uint64_t	Flags for logging info
Name	*char	Object name
ObjectID	uint64_t	Unique ObjectID.
ReplayLoggingFlags	uint64_t	Replay-time category logging flags
TimeSource	*void	Time source object

Name

Type

Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name	Description
delete	Dispose instance of @GrlibL2Cache
new	Create new instance of GrlibL2Cache

Name

Description

delete

Dispose instance of @GrlibL2Cache

new

Create new instance of GrlibL2Cache

Command new Arguments

Name	Type	Required	Description
name	string	yes	Name of object to create

Name

Type

Required

Description

name

string

yes

Name of object to create

GrlibL2Cache Reference

Properties

Name	Type	Description
Class	*void	Class object
Component	*void	Pointer to component object if part of component
L2CACCCColdResetValue	uint32_t	L2C Access control register
L2CACCCForcedBits	uint32_t	L2C Access control register
L2CACCCForcedFlippedBits	uint32_t	L2C Access control register
L2CACCCReadMask	uint32_t	L2C Access control register
L2CACCCResetMask	uint32_t	L2C Access control register
L2CACCCResetValue	uint32_t	L2C Access control register
L2CACCCWriteMask	uint32_t	L2C Access control register
L2CCBColdResetValue	uint32_t	L2C Data-Check-Bits register
L2CCBForcedBits	uint32_t	L2C Data-Check-Bits register
L2CCBForcedFlippedBits	uint32_t	L2C Data-Check-Bits register
L2CCBReadMask	uint32_t	L2C Data-Check-Bits register
L2CCBResetMask	uint32_t	L2C Data-Check-Bits register
L2CCBResetValue	uint32_t	L2C Data-Check-Bits register
L2CCBWriteMask	uint32_t	L2C Data-Check-Bits register
L2CCColdResetValue	uint32_t	L2C Control register
L2CCForcedBits	uint32_t	L2C Control register
L2CCForcedFlippedBits	uint32_t	L2C Control register
L2CCReadMask	uint32_t	L2C Control register
L2CCResetMask	uint32_t	L2C Control register
L2CCResetValue	uint32_t	L2C Control register
L2CCWriteMask	uint32_t	L2C Control register
L2CEINJCFGColdResetValue	uint32_t	L2C injection configuration register
L2CEINJCFGForcedBits	uint32_t	L2C injection configuration register
L2CEINJCFGForcedFlippedBits	uint32_t	L2C injection configuration register
L2CEINJCFGReadMask	uint32_t	L2C injection configuration register
L2CEINJCFGResetMask	uint32_t	L2C injection configuration register
L2CEINJCFGResetValue	uint32_t	L2C injection configuration register
L2CEINJCFGWriteMask	uint32_t	L2C injection configuration register
L2CEINJColdResetValue	uint32_t	L2C Error injection register
L2CEINJForcedBits	uint32_t	L2C Error injection register
L2CEINJForcedFlippedBits	uint32_t	L2C Error injection register
L2CEINJReadMask	uint32_t	L2C Error injection register
L2CEINJResetMask	uint32_t	L2C Error injection register
L2CEINJResetValue	uint32_t	L2C Error injection register
L2CEINJWriteMask	uint32_t	L2C Error injection register
L2CERRAColdResetValue	uint32_t	L2C Error address register
L2CERRAForcedBits	uint32_t	L2C Error address register
L2CERRAForcedFlippedBits	uint32_t	L2C Error address register
L2CERRAReadMask	uint32_t	L2C Error address register
L2CERRAResetMask	uint32_t	L2C Error address register
L2CERRAResetValue	uint32_t	L2C Error address register
L2CERRAWriteMask	uint32_t	L2C Error address register
L2CERRColdResetValue	uint32_t	L2C Error status/control register
L2CERRForcedBits	uint32_t	L2C Error status/control register
L2CERRForcedFlippedBits	uint32_t	L2C Error status/control register
L2CERRReadMask	uint32_t	L2C Error status/control register
L2CERRResetMask	uint32_t	L2C Error status/control register
L2CERRResetValue	uint32_t	L2C Error status/control register
L2CERRWriteMask	uint32_t	L2C Error status/control register
L2CFMAColdResetValue	uint32_t	L2C Flush memory address register
L2CFMAForcedBits	uint32_t	L2C Flush memory address register
L2CFMAForcedFlippedBits	uint32_t	L2C Flush memory address register
L2CFMAReadMask	uint32_t	L2C Flush memory address register
L2CFMAResetMask	uint32_t	L2C Flush memory address register
L2CFMAResetValue	uint32_t	L2C Flush memory address register
L2CFMAWriteMask	uint32_t	L2C Flush memory address register
L2CFSIColdResetValue	uint32_t	L2C Flush set/index register
L2CFSIForcedBits	uint32_t	L2C Flush set/index register
L2CFSIForcedFlippedBits	uint32_t	L2C Flush set/index register
L2CFSIReadMask	uint32_t	L2C Flush set/index register
L2CFSIResetMask	uint32_t	L2C Flush set/index register
L2CFSIResetValue	uint32_t	L2C Flush set/index register
L2CFSIWriteMask	uint32_t	L2C Flush set/index register
L2CSCRUBColdResetValue	uint32_t	L2C Scrub control/status register
L2CSCRUBForcedBits	uint32_t	L2C Scrub control/status register
L2CSCRUBForcedFlippedBits	uint32_t	L2C Scrub control/status register
L2CSCRUBReadMask	uint32_t	L2C Scrub control/status register
L2CSCRUBResetMask	uint32_t	L2C Scrub control/status register
L2CSCRUBResetValue	uint32_t	L2C Scrub control/status register
L2CSCRUBWriteMask	uint32_t	L2C Scrub control/status register
L2CSColdResetValue	uint32_t	L2C Status register
L2CSDELColdResetValue	uint32_t	L2C Scrub delay register
L2CSDELForcedBits	uint32_t	L2C Scrub delay register
L2CSDELForcedFlippedBits	uint32_t	L2C Scrub delay register
L2CSDELReadMask	uint32_t	L2C Scrub delay register
L2CSDELResetMask	uint32_t	L2C Scrub delay register
L2CSDELResetValue	uint32_t	L2C Scrub delay register
L2CSDELWriteMask	uint32_t	L2C Scrub delay register
L2CSForcedBits	uint32_t	L2C Status register
L2CSForcedFlippedBits	uint32_t	L2C Status register
L2CSReadMask	uint32_t	L2C Status register
L2CSResetMask	uint32_t	L2C Status register
L2CSResetValue	uint32_t	L2C Status register
L2CSWriteMask	uint32_t	L2C Status register
L2CTCBColdResetValue	uint32_t	L2C TAG-Check-Bits register
L2CTCBForcedBits	uint32_t	L2C TAG-Check-Bits register
L2CTCBForcedFlippedBits	uint32_t	L2C TAG-Check-Bits register
L2CTCBReadMask	uint32_t	L2C TAG-Check-Bits register
L2CTCBResetMask	uint32_t	L2C TAG-Check-Bits register
L2CTCBResetValue	uint32_t	L2C TAG-Check-Bits register
L2CTCBWriteMask	uint32_t	L2C TAG-Check-Bits register
LocalName	*char	Local name (in component, if applicable)
LogMessageFlags	uint64_t	Per-object log message suppression flags
LoggingFlags	uint64_t	Flags for logging info
Name	*char	Object name
ObjectID	uint64_t	Unique ObjectID.
ReplayLoggingFlags	uint64_t	Replay-time category logging flags
TimeSource	*void	Time source object
accessControl	uint32_t	L2C Access control register
config.littleEndian	uint8_t	Endianess of memory interface.
control	uint32_t	L2C Control register
dataCheckBits	uint32_t	L2C Data-Check-Bits register
errorAddress	uint32_t	L2C Error address register
errorHandlingAndInjectionConfig	uint32_t	L2C injection configuration register
errorInjection	uint32_t	L2C Error injection register
errorStatusCtrl	uint32_t	L2C Error status/control register
flushMem	uint32_t	L2C Flush memory address register
flushSet	uint32_t	L2C Flush set/index register
mtrr	[uint32_t; 32]	L2C Memory type range register
pnp.bar	uint32_t
scrubControlStatus	uint32_t	L2C Scrub control/status register
scrubDelay	uint32_t	L2C Scrub delay register
status	uint32_t	L2C Status register
tagCheckBits	uint32_t	L2C TAG-Check-Bits register

Name

Type

Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

L2CACCCColdResetValue

uint32_t

L2C Access control register

L2CACCCForcedBits

uint32_t

L2C Access control register

L2CACCCForcedFlippedBits

uint32_t

L2C Access control register

L2CACCCReadMask

uint32_t

L2C Access control register

L2CACCCResetMask

uint32_t

L2C Access control register

L2CACCCResetValue

uint32_t

L2C Access control register

L2CACCCWriteMask

uint32_t

L2C Access control register

L2CCBColdResetValue

uint32_t

L2C Data-Check-Bits register

L2CCBForcedBits

uint32_t

L2C Data-Check-Bits register

L2CCBForcedFlippedBits

uint32_t

L2C Data-Check-Bits register

L2CCBReadMask

uint32_t

L2C Data-Check-Bits register

L2CCBResetMask

uint32_t

L2C Data-Check-Bits register

L2CCBResetValue

uint32_t

L2C Data-Check-Bits register

L2CCBWriteMask

uint32_t

L2C Data-Check-Bits register

L2CCColdResetValue

uint32_t

L2C Control register

L2CCForcedBits

uint32_t

L2C Control register

L2CCForcedFlippedBits

uint32_t

L2C Control register

L2CCReadMask

uint32_t

L2C Control register

L2CCResetMask

uint32_t

L2C Control register

L2CCResetValue

uint32_t

L2C Control register

L2CCWriteMask

uint32_t

L2C Control register

L2CEINJCFGColdResetValue

uint32_t

L2C injection configuration register

L2CEINJCFGForcedBits

uint32_t

L2C injection configuration register

L2CEINJCFGForcedFlippedBits

uint32_t

L2C injection configuration register

L2CEINJCFGReadMask

uint32_t

L2C injection configuration register

L2CEINJCFGResetMask

uint32_t

L2C injection configuration register

L2CEINJCFGResetValue

uint32_t

L2C injection configuration register

L2CEINJCFGWriteMask

uint32_t

L2C injection configuration register

L2CEINJColdResetValue

uint32_t

L2C Error injection register

L2CEINJForcedBits

uint32_t

L2C Error injection register

L2CEINJForcedFlippedBits

uint32_t

L2C Error injection register

L2CEINJReadMask

uint32_t

L2C Error injection register

L2CEINJResetMask

uint32_t

L2C Error injection register

L2CEINJResetValue

uint32_t

L2C Error injection register

L2CEINJWriteMask

uint32_t

L2C Error injection register

L2CERRAColdResetValue

uint32_t

L2C Error address register

L2CERRAForcedBits

uint32_t

L2C Error address register

L2CERRAForcedFlippedBits

uint32_t

L2C Error address register

L2CERRAReadMask

uint32_t

L2C Error address register

L2CERRAResetMask

uint32_t

L2C Error address register

L2CERRAResetValue

uint32_t

L2C Error address register

L2CERRAWriteMask

uint32_t

L2C Error address register

L2CERRColdResetValue

uint32_t

L2C Error status/control register

L2CERRForcedBits

uint32_t

L2C Error status/control register

L2CERRForcedFlippedBits

uint32_t

L2C Error status/control register

L2CERRReadMask

uint32_t

L2C Error status/control register

L2CERRResetMask

uint32_t

L2C Error status/control register

L2CERRResetValue

uint32_t

L2C Error status/control register

L2CERRWriteMask

uint32_t

L2C Error status/control register

L2CFMAColdResetValue

uint32_t

L2C Flush memory address register

L2CFMAForcedBits

uint32_t

L2C Flush memory address register

L2CFMAForcedFlippedBits

uint32_t

L2C Flush memory address register

L2CFMAReadMask

uint32_t

L2C Flush memory address register

L2CFMAResetMask

uint32_t

L2C Flush memory address register

L2CFMAResetValue

uint32_t

L2C Flush memory address register

L2CFMAWriteMask

uint32_t

L2C Flush memory address register

L2CFSIColdResetValue

uint32_t

L2C Flush set/index register

L2CFSIForcedBits

uint32_t

L2C Flush set/index register

L2CFSIForcedFlippedBits

uint32_t

L2C Flush set/index register

L2CFSIReadMask

uint32_t

L2C Flush set/index register

L2CFSIResetMask

uint32_t

L2C Flush set/index register

L2CFSIResetValue

uint32_t

L2C Flush set/index register

L2CFSIWriteMask

uint32_t

L2C Flush set/index register

L2CSCRUBColdResetValue

uint32_t

L2C Scrub control/status register

L2CSCRUBForcedBits

uint32_t

L2C Scrub control/status register

L2CSCRUBForcedFlippedBits

uint32_t

L2C Scrub control/status register

L2CSCRUBReadMask

uint32_t

L2C Scrub control/status register

L2CSCRUBResetMask

uint32_t

L2C Scrub control/status register

L2CSCRUBResetValue

uint32_t

L2C Scrub control/status register

L2CSCRUBWriteMask

uint32_t

L2C Scrub control/status register

L2CSColdResetValue

uint32_t

L2C Status register

L2CSDELColdResetValue

uint32_t

L2C Scrub delay register

L2CSDELForcedBits

uint32_t

L2C Scrub delay register

L2CSDELForcedFlippedBits

uint32_t

L2C Scrub delay register

L2CSDELReadMask

uint32_t

L2C Scrub delay register

L2CSDELResetMask

uint32_t

L2C Scrub delay register

L2CSDELResetValue

uint32_t

L2C Scrub delay register

L2CSDELWriteMask

uint32_t

L2C Scrub delay register

L2CSForcedBits

uint32_t

L2C Status register

L2CSForcedFlippedBits

uint32_t

L2C Status register

L2CSReadMask

uint32_t

L2C Status register

L2CSResetMask

uint32_t

L2C Status register

L2CSResetValue

uint32_t

L2C Status register

L2CSWriteMask

uint32_t

L2C Status register

L2CTCBColdResetValue

uint32_t

L2C TAG-Check-Bits register

L2CTCBForcedBits

uint32_t

L2C TAG-Check-Bits register

L2CTCBForcedFlippedBits

uint32_t

L2C TAG-Check-Bits register

L2CTCBReadMask

uint32_t

L2C TAG-Check-Bits register

L2CTCBResetMask

uint32_t

L2C TAG-Check-Bits register

L2CTCBResetValue

uint32_t

L2C TAG-Check-Bits register

L2CTCBWriteMask

uint32_t

L2C TAG-Check-Bits register

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

accessControl

uint32_t

L2C Access control register

config.littleEndian

uint8_t

Endianess of memory interface.

control

uint32_t

L2C Control register

dataCheckBits

uint32_t

L2C Data-Check-Bits register

errorAddress

uint32_t

L2C Error address register

errorHandlingAndInjectionConfig

uint32_t

L2C injection configuration register

errorInjection

uint32_t

L2C Error injection register

errorStatusCtrl

uint32_t

L2C Error status/control register

flushMem

uint32_t

L2C Flush memory address register

flushSet

uint32_t

L2C Flush set/index register

mtrr

[uint32_t; 32]

L2C Memory type range register

pnp.bar

uint32_t

scrubControlStatus

uint32_t

L2C Scrub control/status register

scrubDelay

uint32_t

L2C Scrub delay register

status

uint32_t

L2C Status register

tagCheckBits

uint32_t

L2C TAG-Check-Bits register

Interfaces

Name	Type	Description
AhbIface	AhbIface
DeviceIface	DeviceIface
MemAccessIface	MemAccessIface
RegisterIface	temu::RegisterIface	Auto-generated Register Interface Impl.
ResetIface	ResetIface

Name

Type

Description

AhbIface

DeviceIface

MemAccessIface

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

ResetIface

Registers

Register Bank Regs

Register L2CC

Description: L2C Control register
Reset value: 0x00040000
Warm reset mask: 0xf007ff3f

Field Mask Reset Description

Field	Mask	Reset	Description
EN	`0x80000000`	`0x0`	Cache enable
EDAC	`0x40000000`	`0x0`	EDAC enable
REPL	`0x30000000`	`0x0`	Replacement policy
BBS	`0x00070000`	`0x4`	Backend bus size configuration
INDEX_WAY	`0x0000f000`	`0x0`	Master-index replacement
LOCK	`0x00000f00`	`0x0`	Locked ways
HPRHB	`0x00000020`	`0x0`	HPROT read hit bypass
HPB	`0x00000010`	`0x0`	HPROT bufferable
UC	`0x00000008`	`0x0`	Bus usage status mode
HC	`0x00000004`	`0x0`	Hit rate status mode
WP	`0x00000002`	`0x0`	Write policy
HP	`0x00000001`	`0x0`	HPROT enable

0x80000000

0x0

Cache enable

EDAC

0x40000000

0x0

EDAC enable

REPL

0x30000000

0x0

Replacement policy

BBS

0x00070000

0x4

Backend bus size configuration

INDEX_WAY

0x0000f000

0x0

Master-index replacement

LOCK

0x00000f00

0x0

Locked ways

HPRHB

0x00000020

0x0

HPROT read hit bypass

HPB

0x00000010

0x0

HPROT bufferable

0x00000008

0x0

Bus usage status mode

0x00000004

0x0

Hit rate status mode

0x00000002

0x0

Write policy

0x00000001

0x0

HPROT enable

Register L2CS

Description: L2C Status register
Reset value: 0x00502003
Warm reset mask: 0x01ffffff

Field Mask Reset Description

Field	Mask	Reset	Description
LS	`0x01000000`	`0x0`	Cache line size
AT	`0x00800000`	`0x0`	Access time
MP	`0x00400000`	`0x1`	Memory protection
MTRR	`0x003f0000`	`0x10`	Number of MTRR registers implemented
BBUS_W	`0x0000e000`	`0x1`	Backend bus width
WAY_SIZE	`0x00001ffc`	`0x0`	Cache way size
WAY	`0x00000003`	`0x3`	Multi-way configuration

0x01000000

0x0

Cache line size

0x00800000

0x0

Access time

0x00400000

0x1

Memory protection

MTRR

0x003f0000

0x10

Number of MTRR registers implemented

BBUS_W

0x0000e000

0x1

Backend bus width

WAY_SIZE

0x00001ffc

0x0

Cache way size

WAY

0x00000003

0x3

Multi-way configuration

Register L2CFMA

Description: L2C Flush memory address register
Reset value: 0x00000000
Warm reset mask: 0x00000007

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xffffffe0`	`-`	Memory address
DI	`0x00000008`	`-`	Cache disable
FMODE	`0x00000007`	`0x0`	Flush mode

ADDR

0xffffffe0

-

Memory address

0x00000008

-

Cache disable

FMODE

0x00000007

0x0

Flush mode

Register L2CFSI

Description: L2C Flush set/index register
Reset value: 0x00000000
Warm reset mask: 0x000003b7

Field Mask Reset Description

Field	Mask	Reset	Description
INDEX_TAG	`0xffff0000`	`-`	Cache line index or tag
FL	`0x00000200`	`0x0`	Fetch line
VB	`0x00000100`	`0x0`	Valid bit
DB	`0x00000080`	`0x0`	Dirty bit
WAY	`0x00000030`	`0x0`	Cache way
DI	`0x00000008`	`-`	Cache disable
WF	`0x00000004`	`0x0`	Way flush
FMODE	`0x00000003`	`0x0`	Flush mode

INDEX_TAG

0xffff0000

-

Cache line index or tag

0x00000200

0x0

Fetch line

0x00000100

0x0

Valid bit

0x00000080

0x0

Dirty bit

WAY

0x00000030

0x0

Cache way

0x00000008

-

Cache disable

0x00000004

0x0

Way flush

FMODE

0x00000003

0x0

Flush mode

Register L2CERR

Description: L2C Error status/control register
Reset value: 0x00000000
Warm reset mask: 0x00000ffe

Field Mask Reset Description

Field	Mask	Reset	Description
MASTER	`0xf0000000`	`-`	AHB master that generated the access
SCRUB	`0x08000000`	`-`	Scrub error
TYPE	`0x07000000`	`-`	Access/error type
TAGDATA	`0x00800000`	`-`	Tag or data error
UNCORRECTABLE	`0x00400000`	`-`	Correctable or uncorrectable error
MULTI	`0x00200000`	`-`	Multiple error
VALID	`0x00100000`	`-`	Error status valid
DISERESP	`0x00080000`	`-`	Disable error responses for uncorrectable EDAC error
CORRECTABLE_COUNT	`0x00070000`	`-`	Correctable error counter
IRQ_PENDING	`0x0000f000`	`-`	Interrupt pending
IRQ_MASK	`0x00000f00`	`0x0`	Interrupt mask
CB	`0x000000c0`	`0x0`	Select data check-bits for diagnostic data write
TCB	`0x00000030`	`0x0`	Select tag check-bits for diagnostic tag write
XOR	`0x00000008`	`0x0`	Xor check-bits
RCB	`0x00000004`	`0x0`	Read check-bits
COMP	`0x00000002`	`0x0`	Compare error status
RST	`0x00000001`	`-`	Reset error status

MASTER

0xf0000000

-

AHB master that generated the access

SCRUB

0x08000000

-

Scrub error

TYPE

0x07000000

-

Access/error type

TAGDATA

0x00800000

-

Tag or data error

UNCORRECTABLE

0x00400000

-

Correctable or uncorrectable error

MULTI

0x00200000

-

Multiple error

VALID

0x00100000

-

Error status valid

DISERESP

0x00080000

-

Disable error responses for uncorrectable EDAC error

CORRECTABLE_COUNT

0x00070000

-

Correctable error counter

IRQ_PENDING

0x0000f000

-

Interrupt pending

IRQ_MASK

0x00000f00

0x0

Interrupt mask

0x000000c0

0x0

Select data check-bits for diagnostic data write

TCB

0x00000030

0x0

Select tag check-bits for diagnostic tag write

XOR

0x00000008

0x0

Xor check-bits

RCB

0x00000004

0x0

Read check-bits

COMP

0x00000002

0x0

Compare error status

RST

0x00000001

-

Reset error status

Register L2CERRA

Description: L2C Error address register
Reset value: 0x00000000
Warm reset mask: 0x00000000

Field Mask Reset Description

Field	Mask	Reset	Description
EADDR	`0xffffffff`	`-`	Error address

EADDR

0xffffffff

-

Error address

Register L2CTCB

Description: L2C TAG-Check-Bits register
Reset value: 0x00000000
Warm reset mask: 0x0000007f

Field Mask Reset Description

Field	Mask	Reset	Description
TCB	`0x0000007f`	`0x0`	TAG check-bits

TCB

0x0000007f

0x0

TAG check-bits

Register L2CCB

Description: L2C Data-Check-Bits register
Reset value: 0x00000000
Warm reset mask: 0x0fffffff

Field Mask Reset Description

Field	Mask	Reset	Description
CB	`0x0fffffff`	`0x0`	Data check-bits

0x0fffffff

0x0

Data check-bits

Register L2CSCRUB

Description: L2C Scrub control/status register
Reset value: 0x00000000
Warm reset mask: 0xffff000f

Field Mask Reset Description

Field	Mask	Reset	Description
INDEX	`0xffff0000`	`0x0`	Scrub index
WAY	`0x0000000c`	`0x0`	Scrub way
PEN	`0x00000002`	`0x0`	Scrub pending
EN	`0x00000001`	`0x0`	Scrub enable

INDEX

0xffff0000

0x0

Scrub index

WAY

0x0000000c

0x0

Scrub way

PEN

0x00000002

0x0

Scrub pending

0x00000001

0x0

Scrub enable

Register L2CSDEL

Description: L2C Scrub delay register
Reset value: 0x00000000
Warm reset mask: 0x0000ffff

Field Mask Reset Description

Field	Mask	Reset	Description
DEL	`0x0000ffff`	`0x0`	Scrub delay

DEL

0x0000ffff

0x0

Scrub delay

Register L2CEINJ

Description: L2C Error injection register
Reset value: 0x00000000
Warm reset mask: 0xfffffffd

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffffffc`	`0x0`	Error inject address
INJ	`0x00000001`	`0x0`	Inject error

ADDR

0xfffffffc

0x0

Error inject address

INJ

0x00000001

0x0

Inject error

Register L2CACCC

Description: L2C Access control register
Reset value: 0x00000000
Warm reset mask: 0x000067f6

Field Mask Reset Description

Field	Mask	Reset	Description
DSC	`0x00004000`	`0x0`	Disable cancellation and reissue of scrubber operation
SH	`0x00002000`	`0x0`	Scrubber hold
SPLITQ	`0x00000400`	`0x0`	SPLIT queue write order
NHM	`0x00000200`	`0x0`	No hit for cache misses
BERR	`0x00000100`	`0x0`	Bit error status
OAPM	`0x00000080`	`0x0`	One access per master
FLINE	`0x00000040`	`0x0`	Fetch line replacement
DBPF	`0x00000020`	`0x0`	Disable bypass prefetching
128WF	`0x00000010`	`0x0`	128-bit write line fetch
DBPWS	`0x00000004`	`0x0`	Disable wait-states for discarded bypass data
SPLIT	`0x00000002`	`0x0`	Enable SPLIT response

DSC

0x00004000

0x0

Disable cancellation and reissue of scrubber operation

0x00002000

0x0

Scrubber hold

SPLITQ

0x00000400

0x0

SPLIT queue write order

NHM

0x00000200

0x0

No hit for cache misses

BERR

0x00000100

0x0

Bit error status

OAPM

0x00000080

0x0

One access per master

FLINE

0x00000040

0x0

Fetch line replacement

DBPF

0x00000020

0x0

Disable bypass prefetching

128WF

0x00000010

0x0

128-bit write line fetch

DBPWS

0x00000004

0x0

Disable wait-states for discarded bypass data

SPLIT

0x00000002

0x0

Enable SPLIT response

Register L2CEINJCFG

Description: L2C injection configuration register
Reset value: 0x00000000
Warm reset mask: 0x00000700

Field Mask Reset Description

Field	Mask	Reset	Description
EDI	`0x00000400`	`0x0`	Enable invalidation of cache line with uncorrectable data error
TER	`0x00000200`	`0x0`	Disable error response on uncorrectable TAG error detection
IMD	`0x00000100`	`0x0`	Disable index match only after uncorrectable TAG error

EDI

0x00000400

0x0

Enable invalidation of cache line with uncorrectable data error

TER

0x00000200

0x0

Disable error response on uncorrectable TAG error detection

IMD

0x00000100

0x0

Disable index match only after uncorrectable TAG error

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

Field	Mask	Reset	Description
ADDR	`0xfffc0000`	`0x0`	Address field
ACC	`0x00030000`	`0x0`	Access field
MASK	`0x0000fffc`	`0x0`	Address mask
WP	`0x00000002`	`0x0`	Write protection
AC	`0x00000001`	`0x0`	Access control field

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Register L2CMTRR

Description: L2C Memory type range register
Reset value: 0x00000000
Warm reset mask: 0xffffffff

Field Mask Reset Description

ADDR

0xfffc0000

0x0

Address field

ACC

0x00030000

0x0

Access field

MASK

0x0000fffc

0x0

Address mask

0x00000002

0x0

Write protection

0x00000001

0x0

Access control field

Commands

Name

Description

delete

Dispose instance of GrlibL2Cache

GRLIB L2CACHE Model

Loading the Plugin

Configuration

@GrlibL2Cache Reference

Properties

Commands

Command new Arguments

GrlibL2Cache Reference

Properties

Interfaces

Registers

Register Bank Regs

Register L2CC

Register L2CS

Register L2CFMA

Register L2CFSI

Register L2CERR

Register L2CERRA

Register L2CTCB

Register L2CCB

Register L2CSCRUB

Register L2CSDEL

Register L2CEINJ

Register L2CACCC

Register L2CEINJCFG

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Register L2CMTRR

Commands

Limitations