Configuration

Interrupt Delivery

The property irqControl should be connected to the device which the MEC raises interrupts on, this is normally a CPU object. The connection should be made to the CPU-object’s interface of type IrqIface. Note that the CPU must support interrupts 1 through 15, this is in general case correct for SPARC based processors, but other CPUs may not be compatible.

UART Connections

Two serial interfaces exist, the UartAIface and the UartBIface, these can be connected to in order to receive data from remote serial port terminals (i.e. this is the RX direction). The uarta and uartb properties can be used to connect the TX direction of the UARTs.

Infinite UART Speed

Set config.infiniteUartSpeed to nonzero to enable infinite speed on the Tx channels. With infinite speed, a written byte is immediately forwarded to the destination device, with limited UART speed (the variable being zero) the timing due to UART scaler bits (upper 8 bits of the MecCtrlReg) will be simulated, leading to realistic byte rates over the serial port device. Note that individual bits are not transmitted only the bytes.

@Mec Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @Mec

new

Create new instance of Mec

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

Mec Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

TimeSource

*void

Time source object

accessProtSegment1Base

uint32_t

accessProtSegment1End

uint32_t

accessProtSegment2Base

uint32_t

accessProtSegment2End

uint32_t

config.infiniteUartSpeed

uint32_t

cpu

temu_IfaceRef/ <unknown>

Processor

errorAndResetStatus

uint32_t

failingAddr

uint32_t

gpiConfig

uint32_t

gpiData

uint32_t

gptCounter

uint32_t

gptCounterProgramReg

uint32_t

gptScaler

uint32_t

gptScalerProgramReg

uint32_t

ioConfig

uint32_t

irqClear

uint32_t

irqControl

temu_IfaceRef/ <unknown>

Upstream interrupt controller (e.g. CPU)

irqForce

uint32_t

irqMask

uint32_t

irqPending

uint32_t

irqShape

uint32_t

irqSignalStatus

uint16_t

Interrupt signal status (should be the same as pending in CPU)

mecCtrl

uint32_t

memoryConfig

uint32_t

outSignals

[temu_IfaceRef; 8]/ <unknown>

GPIO signals

powerDown

uint32_t

rtcCounter

uint32_t

rtcCounterProgramReg

uint32_t

rtcScaler

uint32_t

rtcScalerProgramReg

uint32_t

softwareReset

uint32_t

systemFaultStatus

uint32_t

testControl

uint32_t

timerControl

uint32_t

uartChanARxTx

uint32_t

uartChanBRxTx

uint32_t

uartStatus

uint32_t

uarta

temu_IfaceRef/ <unknown>

Serial port A

uartb

temu_IfaceRef/ <unknown>

Serial port B

waitStateConfig

uint32_t

wdogProgAndTimeoutAck

uint32_t

wdogTrapDoorSet

uint32_t

Interfaces

Name Type Description

DeviceIface

DeviceIface

IrqClientIface

IrqClientIface

IrqIface

IrqIface

MemAccessIface

MemAccessIface

ResetIface

ResetIface

SignalIface

SignalIface

Incomming signals

UartAIface

SerialIface

UartBIface

SerialIface

Ports

Prop Iface Description

irqControl

IrqClientIface

uart a

uarta

UartAIface

uart a

uartb

UartBIface

uart b

Commands

Name Description

delete

Dispose instance of Mec