GRLIB GRCLKGATE Model

The GRCLKGATE device is part of the GRLIB IP library. It is available in libTEMUGrClkgate.so.

Loading the Plugin

import GrClkgate

Configuration

@GRCLKGATE Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @GRCLKGATE

new

Create new instance of GRCLKGATE

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

GRCLKGATE Reference

Properties

Name Type Description

CLKENColdResetValue

uint32_t

Clock enable register

CLKENForcedBits

uint32_t

Clock enable register

CLKENForcedFlippedBits

uint32_t

Clock enable register

CLKENReadMask

uint32_t

Clock enable register

CLKENResetMask

uint32_t

Clock enable register

CLKENResetValue

uint32_t

Clock enable register

CLKENWriteMask

uint32_t

Clock enable register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

OVERRIDEColdResetValue

uint32_t

CPU/FPU override register

OVERRIDEForcedBits

uint32_t

CPU/FPU override register

OVERRIDEForcedFlippedBits

uint32_t

CPU/FPU override register

OVERRIDEReadMask

uint32_t

CPU/FPU override register

OVERRIDEResetMask

uint32_t

CPU/FPU override register

OVERRIDEResetValue

uint32_t

CPU/FPU override register

OVERRIDEWriteMask

uint32_t

CPU/FPU override register

ObjectID

uint64_t

Unique ObjectID.

RESETColdResetValue

uint32_t

Reset register

RESETForcedBits

uint32_t

Reset register

RESETForcedFlippedBits

uint32_t

Reset register

RESETReadMask

uint32_t

Reset register

RESETResetMask

uint32_t

Reset register

RESETResetValue

uint32_t

Reset register

RESETWriteMask

uint32_t

Reset register

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

UNLOCKColdResetValue

uint32_t

Clock unlock register

UNLOCKForcedBits

uint32_t

Clock unlock register

UNLOCKForcedFlippedBits

uint32_t

Clock unlock register

UNLOCKReadMask

uint32_t

Clock unlock register

UNLOCKResetMask

uint32_t

Clock unlock register

UNLOCKResetValue

uint32_t

Clock unlock register

UNLOCKWriteMask

uint32_t

Clock unlock register

apb.pnp.bar

uint32_t

apb.pnp.config

uint32_t

clockEnableReg

uint32_t

Clock enable register

config.littleEndian

uint8_t

Endianess of memory interface.

coreResetReg

uint32_t

Reset register

overrideReg

uint32_t

CPU/FPU override register

unlockReg

uint32_t

Clock unlock register

Interfaces

Name Type Description

ApbIface

ApbIface

DeviceIface

DeviceIface

MemAccessIface

MemAccessIface

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

ResetIface

ResetIface

Registers

Register support is currently experimental!

Register Bank Regs

Register UNLOCK
Description

Clock unlock register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

unlock

0xffffffff

0x0

Unlock enable and reset register (Only bits x:0)
Register CLKEN
Description

Clock enable register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

enable

0xffffffff

0x0

Clock enable (Only bits x:0)
Register RESET
Description

Reset register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

reset

0xffffffff

0x0

Reset (Only bits x:0)
Register OVERRIDE
Description

CPU/FPU override register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

foverride

0xffff0000

0x0

Override FPU clk gating (Only bits y:16)

override

0x0000ffff

0x0

Override CPU clk gating (Only bits x:0)

Commands

Name Description

delete

Dispose instance of GRCLKGATE

Limitations

The GRCLKGATE model is a non functional model.

The main purpose of the device is to save power by cutting off the clock to devices, and power consumption is not modelled in TEMU.