P2020 eTSEC Model
This section describes the P2020 eTSEC Ethernet controller model.
The eTSECs of the device include these distinctive features:
-
TCP/IP off-load:
-
IP v4 and IP v6 header recognition on receive;
-
IP v4 header checksum verification and generation;
-
TCP and UDP checksum verification and generation;
-
Per-packet configurable off-load.
-
-
Support for different Ethernet physical interfaces (MII, GMII, RMII, RGMII, TBI and RTBI.).
Configuration
- config.interfaceMode
-
Interface Mode (MII 10/100 Mbps, RMII 100 Mbps, RMII 10 Mbps, GMII 1Gbps, etc).
The GenericPHY is a PHY / MII device which supports both the MDIO interface and the PHY interface for sending/receiving ethernet frames. It is connected to MDIO bus via MDIOIface and to eTSEC via PHYIface. An ethernet link must be connected to its attached PHYs via EthernetIface;
The MDIO bus distributes MDIO control messages and supports routing of them. The MDIO bus use the same interface as an MDIO device. It is connected to eTSEC via MDIOIface.
Before starting the communications all mentioned above models should be created and connected as follows:
// connect MDIO bus with MAC controller and PHY circuit.
temu_connect(miibus, "macDevice", etsec, "MACIface");
temu_connect(miibus, "phyDevices", phy, "MDIOIface");
// connect eTSEC with MDIO bus and PHY
temu_connect(etsec, "mdioBus", miibus, "MDIOIface");
temu_connect(etsec, "phy", phy, "PHYIface");
// connect MAC device to PHY
temu_connect(phy, "macDevice", etsec, "MACIface");
// connect ethernet link
temu_connect(phy, "ethernetLink", ethlink, "EthernetIface");# connect MDIO bus with MAC controller and PHY circuit.
connect a=miibus.macDevice b=etsec:MACIface
connect a=miibus.phyDevices b=phy:MDIOIface
# connect eTSEC with MDIO bus and PHY
connect a=etsec.mdioBus b=miibus:MDIOIface
connect a=etsec.phy b=phy:PHYIface
# connect MAC device to PHY
connect a=phy.macDevice b=etsec:MACIface
# connect ethernet link
connect a=phy.ethernetLink b=ethlink:EthernetIfaceAn ethernet link must be connected to its attached PHYs.
Connection is done using the connect command.
ethlink.connect device=phy:PHYIfaceThe eTSEC programmable registers that occupy memory-mapped space are named according to P2020 QorIQ integrated processor reference manual. All the eTSEC registers are 4-byte wide.
To set MAC address MACSTNADDR1 and MACSTNADDR2 registers should be filled. The value of the station address written into MACSTNADDR1 and MACSTNADDR2 is byte reversed from how it would appear in the DA field of a frame in memory. For example, for a station address of 0x12345678ABCD, MACSTNADDR1 is set to 0xCDAB7856 and MACSTNADDR2 is set to 0x34120000.
// Write MACSTNADDR1 register value to set MAC to 00:00:00:00:00:01
temu_writeValueU32(etsec, "MACSTNADDR1", 0x01000000, 0);# Write MACSTNADDR1 register value to set MAC to 00:00:00:00:00:01
etsec.MACSTNADDR1 = 0x01000000MAC address also can be set via setMAC command:
etsec.setMAC mac=\"00:00:00:00:00:01\"@eTSEC Reference
Properties
| Name | Type | Description |
|---|---|---|
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TimeSource |
*void |
Time source object |
eTSEC Reference
Properties
| Name | Type | Description |
|---|---|---|
ATTR |
uint32_t |
Attribute register |
ATTRColdResetValue |
uint32_t |
Attribute register |
ATTRELI |
uint32_t |
Attribute extract length and extract index register |
ATTRELIColdResetValue |
uint32_t |
Attribute extract length and extract index register |
ATTRELIForcedBits |
uint32_t |
Attribute extract length and extract index register |
ATTRELIForcedFlippedBits |
uint32_t |
Attribute extract length and extract index register |
ATTRELIReadMask |
uint32_t |
Attribute extract length and extract index register |
ATTRELIResetMask |
uint32_t |
Attribute extract length and extract index register |
ATTRELIResetValue |
uint32_t |
Attribute extract length and extract index register |
ATTRELIWriteMask |
uint32_t |
Attribute extract length and extract index register |
ATTRForcedBits |
uint32_t |
Attribute register |
ATTRForcedFlippedBits |
uint32_t |
Attribute register |
ATTRReadMask |
uint32_t |
Attribute register |
ATTRResetMask |
uint32_t |
Attribute register |
ATTRResetValue |
uint32_t |
Attribute register |
ATTRWriteMask |
uint32_t |
Attribute register |
CAM |
[uint32_t; 2] |
Carry mask register |
CAR |
[uint32_t; 2] |
Carry register |
Class |
*void |
Class object |
Component |
*void |
Pointer to component object if part of component |
DFVLAN |
uint32_t |
Default VLAN control word |
DFVLANColdResetValue |
uint32_t |
Default VLAN control word |
DFVLANForcedBits |
uint32_t |
Default VLAN control word |
DFVLANForcedFlippedBits |
uint32_t |
Default VLAN control word |
DFVLANReadMask |
uint32_t |
Default VLAN control word |
DFVLANResetMask |
uint32_t |
Default VLAN control word |
DFVLANResetValue |
uint32_t |
Default VLAN control word |
DFVLANWriteMask |
uint32_t |
Default VLAN control word |
DMACTRL |
uint32_t |
DMA control register |
DMACTRLColdResetValue |
uint32_t |
DMA control register |
DMACTRLForcedBits |
uint32_t |
DMA control register |
DMACTRLForcedFlippedBits |
uint32_t |
DMA control register |
DMACTRLReadMask |
uint32_t |
DMA control register |
DMACTRLResetMask |
uint32_t |
DMA control register |
DMACTRLResetValue |
uint32_t |
DMA control register |
DMACTRLWriteMask |
uint32_t |
DMA control register |
ECNTRL |
uint32_t |
Ethernet control register |
ECNTRLColdResetValue |
uint32_t |
Ethernet control register |
ECNTRLForcedBits |
uint32_t |
Ethernet control register |
ECNTRLForcedFlippedBits |
uint32_t |
Ethernet control register |
ECNTRLReadMask |
uint32_t |
Ethernet control register |
ECNTRLResetMask |
uint32_t |
Ethernet control register |
ECNTRLResetValue |
uint32_t |
Ethernet control register |
ECNTRLWriteMask |
uint32_t |
Ethernet control register |
EDIS |
uint32_t |
Error disabled register |
EDISColdResetValue |
uint32_t |
Error disabled register |
EDISForcedBits |
uint32_t |
Error disabled register |
EDISForcedFlippedBits |
uint32_t |
Error disabled register |
EDISReadMask |
uint32_t |
Error disabled register |
EDISResetMask |
uint32_t |
Error disabled register |
EDISResetValue |
uint32_t |
Error disabled register |
EDISWriteMask |
uint32_t |
Error disabled register |
GADDR |
[uint32_t; 8] |
Group address register n |
HAFDUP |
uint32_t |
Half-duplex control register |
HAFDUPColdResetValue |
uint32_t |
Half-duplex control register |
HAFDUPForcedBits |
uint32_t |
Half-duplex control register |
HAFDUPForcedFlippedBits |
uint32_t |
Half-duplex control register |
HAFDUPReadMask |
uint32_t |
Half-duplex control register |
HAFDUPResetMask |
uint32_t |
Half-duplex control register |
HAFDUPResetValue |
uint32_t |
Half-duplex control register |
HAFDUPWriteMask |
uint32_t |
Half-duplex control register |
IEVENT |
uint32_t |
Interrupt event register |
IEVENTColdResetValue |
uint32_t |
Interrupt event register |
IEVENTForcedBits |
uint32_t |
Interrupt event register |
IEVENTForcedFlippedBits |
uint32_t |
Interrupt event register |
IEVENTReadMask |
uint32_t |
Interrupt event register |
IEVENTResetMask |
uint32_t |
Interrupt event register |
IEVENTResetValue |
uint32_t |
Interrupt event register |
IEVENTWriteMask |
uint32_t |
Interrupt event register |
IFSTAT |
uint32_t |
Interface status register |
IFSTATColdResetValue |
uint32_t |
Interface status register |
IFSTATForcedBits |
uint32_t |
Interface status register |
IFSTATForcedFlippedBits |
uint32_t |
Interface status register |
IFSTATReadMask |
uint32_t |
Interface status register |
IFSTATResetMask |
uint32_t |
Interface status register |
IFSTATResetValue |
uint32_t |
Interface status register |
IFSTATWriteMask |
uint32_t |
Interface status register |
IGADDR |
[uint32_t; 8] |
Individual/group address register n |
IMASK |
uint32_t |
Interrupt mask register |
IMASKColdResetValue |
uint32_t |
Interrupt mask register |
IMASKForcedBits |
uint32_t |
Interrupt mask register |
IMASKForcedFlippedBits |
uint32_t |
Interrupt mask register |
IMASKReadMask |
uint32_t |
Interrupt mask register |
IMASKResetMask |
uint32_t |
Interrupt mask register |
IMASKResetValue |
uint32_t |
Interrupt mask register |
IMASKWriteMask |
uint32_t |
Interrupt mask register |
IPGIFG |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGColdResetValue |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGForcedBits |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGForcedFlippedBits |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGReadMask |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGResetMask |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGResetValue |
uint32_t |
Inter-packet/inter-frame gap register |
IPGIFGWriteMask |
uint32_t |
Inter-packet/inter-frame gap register |
LocalName |
*char |
Local name (in component, if applicable) |
LogMessageFlags |
uint64_t |
Per-object log message suppression flags |
LoggingFlags |
uint64_t |
Flags for logging info |
MACCFG1 |
uint32_t |
MAC configuration register 1 |
MACCFG1ColdResetValue |
uint32_t |
MAC configuration register 1 |
MACCFG1ForcedBits |
uint32_t |
MAC configuration register 1 |
MACCFG1ForcedFlippedBits |
uint32_t |
MAC configuration register 1 |
MACCFG1ReadMask |
uint32_t |
MAC configuration register 1 |
MACCFG1ResetMask |
uint32_t |
MAC configuration register 1 |
MACCFG1ResetValue |
uint32_t |
MAC configuration register 1 |
MACCFG1WriteMask |
uint32_t |
MAC configuration register 1 |
MACCFG2 |
uint32_t |
MAC configuration register 2 |
MACCFG2ColdResetValue |
uint32_t |
MAC configuration register 2 |
MACCFG2ForcedBits |
uint32_t |
MAC configuration register 2 |
MACCFG2ForcedFlippedBits |
uint32_t |
MAC configuration register 2 |
MACCFG2ReadMask |
uint32_t |
MAC configuration register 2 |
MACCFG2ResetMask |
uint32_t |
MAC configuration register 2 |
MACCFG2ResetValue |
uint32_t |
MAC configuration register 2 |
MACCFG2WriteMask |
uint32_t |
MAC configuration register 2 |
MACSTNADDR1 |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ColdResetValue |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ForcedBits |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ForcedFlippedBits |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ReadMask |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ResetMask |
uint32_t |
MAC station address register 1 |
MACSTNADDR1ResetValue |
uint32_t |
MAC station address register 1 |
MACSTNADDR1WriteMask |
uint32_t |
MAC station address register 1 |
MACSTNADDR2 |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ColdResetValue |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ForcedBits |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ForcedFlippedBits |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ReadMask |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ResetMask |
uint32_t |
MAC station address register 2 |
MACSTNADDR2ResetValue |
uint32_t |
MAC station address register 2 |
MACSTNADDR2WriteMask |
uint32_t |
MAC station address register 2 |
MACnADDR1 |
[uint32_t; 15] |
MAC exact match address n, part 1 |
MACnADDR2 |
[uint32_t; 15] |
MAC exact match address n, part 2 |
MAXFRM |
uint32_t |
Maximum frame length register |
MAXFRMColdResetValue |
uint32_t |
Maximum frame length register |
MAXFRMForcedBits |
uint32_t |
Maximum frame length register |
MAXFRMForcedFlippedBits |
uint32_t |
Maximum frame length register |
MAXFRMReadMask |
uint32_t |
Maximum frame length register |
MAXFRMResetMask |
uint32_t |
Maximum frame length register |
MAXFRMResetValue |
uint32_t |
Maximum frame length register |
MAXFRMWriteMask |
uint32_t |
Maximum frame length register |
MIIMADD |
uint32_t |
MII management address register |
MIIMADDColdResetValue |
uint32_t |
MII management address register |
MIIMADDForcedBits |
uint32_t |
MII management address register |
MIIMADDForcedFlippedBits |
uint32_t |
MII management address register |
MIIMADDReadMask |
uint32_t |
MII management address register |
MIIMADDResetMask |
uint32_t |
MII management address register |
MIIMADDResetValue |
uint32_t |
MII management address register |
MIIMADDWriteMask |
uint32_t |
MII management address register |
MIIMCFG |
uint32_t |
MII management configuration register |
MIIMCFGColdResetValue |
uint32_t |
MII management configuration register |
MIIMCFGForcedBits |
uint32_t |
MII management configuration register |
MIIMCFGForcedFlippedBits |
uint32_t |
MII management configuration register |
MIIMCFGReadMask |
uint32_t |
MII management configuration register |
MIIMCFGResetMask |
uint32_t |
MII management configuration register |
MIIMCFGResetValue |
uint32_t |
MII management configuration register |
MIIMCFGWriteMask |
uint32_t |
MII management configuration register |
MIIMCOM |
uint32_t |
MII management command register |
MIIMCOMColdResetValue |
uint32_t |
MII management command register |
MIIMCOMForcedBits |
uint32_t |
MII management command register |
MIIMCOMForcedFlippedBits |
uint32_t |
MII management command register |
MIIMCOMReadMask |
uint32_t |
MII management command register |
MIIMCOMResetMask |
uint32_t |
MII management command register |
MIIMCOMResetValue |
uint32_t |
MII management command register |
MIIMCOMWriteMask |
uint32_t |
MII management command register |
MIIMCON |
uint32_t |
MII management control register |
MIIMCONColdResetValue |
uint32_t |
MII management control register |
MIIMCONForcedBits |
uint32_t |
MII management control register |
MIIMCONForcedFlippedBits |
uint32_t |
MII management control register |
MIIMCONReadMask |
uint32_t |
MII management control register |
MIIMCONResetMask |
uint32_t |
MII management control register |
MIIMCONResetValue |
uint32_t |
MII management control register |
MIIMCONWriteMask |
uint32_t |
MII management control register |
MIIMIND |
uint32_t |
MII management indicator register |
MIIMINDColdResetValue |
uint32_t |
MII management indicator register |
MIIMINDForcedBits |
uint32_t |
MII management indicator register |
MIIMINDForcedFlippedBits |
uint32_t |
MII management indicator register |
MIIMINDReadMask |
uint32_t |
MII management indicator register |
MIIMINDResetMask |
uint32_t |
MII management indicator register |
MIIMINDResetValue |
uint32_t |
MII management indicator register |
MIIMINDWriteMask |
uint32_t |
MII management indicator register |
MIIMSTAT |
uint32_t |
MII management status register |
MIIMSTATColdResetValue |
uint32_t |
MII management status register |
MIIMSTATForcedBits |
uint32_t |
MII management status register |
MIIMSTATForcedFlippedBits |
uint32_t |
MII management status register |
MIIMSTATReadMask |
uint32_t |
MII management status register |
MIIMSTATResetMask |
uint32_t |
MII management status register |
MIIMSTATResetValue |
uint32_t |
MII management status register |
MIIMSTATWriteMask |
uint32_t |
MII management status register |
MRBLR |
uint32_t |
Maximum receive buffer length register |
MRBLRColdResetValue |
uint32_t |
Maximum receive buffer length register |
MRBLRForcedBits |
uint32_t |
Maximum receive buffer length register |
MRBLRForcedFlippedBits |
uint32_t |
Maximum receive buffer length register |
MRBLRReadMask |
uint32_t |
Maximum receive buffer length register |
MRBLRResetMask |
uint32_t |
Maximum receive buffer length register |
MRBLRResetValue |
uint32_t |
Maximum receive buffer length register |
MRBLRWriteMask |
uint32_t |
Maximum receive buffer length register |
Name |
*char |
Object name |
ObjectID |
uint64_t |
Unique ObjectID. |
PTV |
uint32_t |
Pause time value register |
PTVColdResetValue |
uint32_t |
Pause time value register |
PTVForcedBits |
uint32_t |
Pause time value register |
PTVForcedFlippedBits |
uint32_t |
Pause time value register |
PTVReadMask |
uint32_t |
Pause time value register |
PTVResetMask |
uint32_t |
Pause time value register |
PTVResetValue |
uint32_t |
Pause time value register |
PTVWriteMask |
uint32_t |
Pause time value register |
RALN |
uint32_t |
Receive alignment error counter |
RALNColdResetValue |
uint32_t |
Receive alignment error counter |
RALNForcedBits |
uint32_t |
Receive alignment error counter |
RALNForcedFlippedBits |
uint32_t |
Receive alignment error counter |
RALNReadMask |
uint32_t |
Receive alignment error counter |
RALNResetMask |
uint32_t |
Receive alignment error counter |
RALNResetValue |
uint32_t |
Receive alignment error counter |
RALNWriteMask |
uint32_t |
Receive alignment error counter |
RBASE |
[uint32_t; 8] |
RxBD base address of ring n |
RBASEH |
uint32_t |
RxBD base address high bits |
RBASEHColdResetValue |
uint32_t |
RxBD base address high bits |
RBASEHForcedBits |
uint32_t |
RxBD base address high bits |
RBASEHForcedFlippedBits |
uint32_t |
RxBD base address high bits |
RBASEHReadMask |
uint32_t |
RxBD base address high bits |
RBASEHResetMask |
uint32_t |
RxBD base address high bits |
RBASEHResetValue |
uint32_t |
RxBD base address high bits |
RBASEHWriteMask |
uint32_t |
RxBD base address high bits |
RBCA |
uint32_t |
Receive broadcast packet counter |
RBCAColdResetValue |
uint32_t |
Receive broadcast packet counter |
RBCAForcedBits |
uint32_t |
Receive broadcast packet counter |
RBCAForcedFlippedBits |
uint32_t |
Receive broadcast packet counter |
RBCAReadMask |
uint32_t |
Receive broadcast packet counter |
RBCAResetMask |
uint32_t |
Receive broadcast packet counter |
RBCAResetValue |
uint32_t |
Receive broadcast packet counter |
RBCAWriteMask |
uint32_t |
Receive broadcast packet counter |
RBDBPH |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHColdResetValue |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHForcedBits |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHForcedFlippedBits |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHReadMask |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHResetMask |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHResetValue |
uint32_t |
Rx data buffer pointer high bits |
RBDBPHWriteMask |
uint32_t |
Rx data buffer pointer high bits |
RBIFX |
uint32_t |
Receive bit field extract control register |
RBIFXColdResetValue |
uint32_t |
Receive bit field extract control register |
RBIFXForcedBits |
uint32_t |
Receive bit field extract control register |
RBIFXForcedFlippedBits |
uint32_t |
Receive bit field extract control register |
RBIFXReadMask |
uint32_t |
Receive bit field extract control register |
RBIFXResetMask |
uint32_t |
Receive bit field extract control register |
RBIFXResetValue |
uint32_t |
Receive bit field extract control register |
RBIFXWriteMask |
uint32_t |
Receive bit field extract control register |
RBPTR |
[uint32_t; 8] |
RxBD pointer for ring n |
RBYT |
uint32_t |
Receive byte counter |
RBYTColdResetValue |
uint32_t |
Receive byte counter |
RBYTForcedBits |
uint32_t |
Receive byte counter |
RBYTForcedFlippedBits |
uint32_t |
Receive byte counter |
RBYTReadMask |
uint32_t |
Receive byte counter |
RBYTResetMask |
uint32_t |
Receive byte counter |
RBYTResetValue |
uint32_t |
Receive byte counter |
RBYTWriteMask |
uint32_t |
Receive byte counter |
RCSE |
uint32_t |
Receive carrier sense error counter |
RCSEColdResetValue |
uint32_t |
Receive carrier sense error counter |
RCSEForcedBits |
uint32_t |
Receive carrier sense error counter |
RCSEForcedFlippedBits |
uint32_t |
Receive carrier sense error counter |
RCSEReadMask |
uint32_t |
Receive carrier sense error counter |
RCSEResetMask |
uint32_t |
Receive carrier sense error counter |
RCSEResetValue |
uint32_t |
Receive carrier sense error counter |
RCSEWriteMask |
uint32_t |
Receive carrier sense error counter |
RCTRL |
uint32_t |
Receive control register |
RCTRLColdResetValue |
uint32_t |
Receive control register |
RCTRLForcedBits |
uint32_t |
Receive control register |
RCTRLForcedFlippedBits |
uint32_t |
Receive control register |
RCTRLReadMask |
uint32_t |
Receive control register |
RCTRLResetMask |
uint32_t |
Receive control register |
RCTRLResetValue |
uint32_t |
Receive control register |
RCTRLWriteMask |
uint32_t |
Receive control register |
RDRP |
uint32_t |
Receive drop counter |
RDRPColdResetValue |
uint32_t |
Receive drop counter |
RDRPForcedBits |
uint32_t |
Receive drop counter |
RDRPForcedFlippedBits |
uint32_t |
Receive drop counter |
RDRPReadMask |
uint32_t |
Receive drop counter |
RDRPResetMask |
uint32_t |
Receive drop counter |
RDRPResetValue |
uint32_t |
Receive drop counter |
RDRPWriteMask |
uint32_t |
Receive drop counter |
RFBPTR |
[uint32_t; 8] |
Last free RxBD pointer for ring n |
RFCS |
uint32_t |
Receive FCS error counter |
RFCSColdResetValue |
uint32_t |
Receive FCS error counter |
RFCSForcedBits |
uint32_t |
Receive FCS error counter |
RFCSForcedFlippedBits |
uint32_t |
Receive FCS error counter |
RFCSReadMask |
uint32_t |
Receive FCS error counter |
RFCSResetMask |
uint32_t |
Receive FCS error counter |
RFCSResetValue |
uint32_t |
Receive FCS error counter |
RFCSWriteMask |
uint32_t |
Receive FCS error counter |
RFLR |
uint32_t |
Receive frame length error counter |
RFLRColdResetValue |
uint32_t |
Receive frame length error counter |
RFLRForcedBits |
uint32_t |
Receive frame length error counter |
RFLRForcedFlippedBits |
uint32_t |
Receive frame length error counter |
RFLRReadMask |
uint32_t |
Receive frame length error counter |
RFLRResetMask |
uint32_t |
Receive frame length error counter |
RFLRResetValue |
uint32_t |
Receive frame length error counter |
RFLRWriteMask |
uint32_t |
Receive frame length error counter |
RFRG |
uint32_t |
Receive fragments counter |
RFRGColdResetValue |
uint32_t |
Receive fragments counter |
RFRGForcedBits |
uint32_t |
Receive fragments counter |
RFRGForcedFlippedBits |
uint32_t |
Receive fragments counter |
RFRGReadMask |
uint32_t |
Receive fragments counter |
RFRGResetMask |
uint32_t |
Receive fragments counter |
RFRGResetValue |
uint32_t |
Receive fragments counter |
RFRGWriteMask |
uint32_t |
Receive fragments counter |
RJBR |
uint32_t |
Receive jabber counter |
RJBRColdResetValue |
uint32_t |
Receive jabber counter |
RJBRForcedBits |
uint32_t |
Receive jabber counter |
RJBRForcedFlippedBits |
uint32_t |
Receive jabber counter |
RJBRReadMask |
uint32_t |
Receive jabber counter |
RJBRResetMask |
uint32_t |
Receive jabber counter |
RJBRResetValue |
uint32_t |
Receive jabber counter |
RJBRWriteMask |
uint32_t |
Receive jabber counter |
RMCA |
uint32_t |
Receive multicast packet counter |
RMCAColdResetValue |
uint32_t |
Receive multicast packet counter |
RMCAForcedBits |
uint32_t |
Receive multicast packet counter |
RMCAForcedFlippedBits |
uint32_t |
Receive multicast packet counter |
RMCAReadMask |
uint32_t |
Receive multicast packet counter |
RMCAResetMask |
uint32_t |
Receive multicast packet counter |
RMCAResetValue |
uint32_t |
Receive multicast packet counter |
RMCAWriteMask |
uint32_t |
Receive multicast packet counter |
ROVR |
uint32_t |
Receive oversize packet counter |
ROVRColdResetValue |
uint32_t |
Receive oversize packet counter |
ROVRForcedBits |
uint32_t |
Receive oversize packet counter |
ROVRForcedFlippedBits |
uint32_t |
Receive oversize packet counter |
ROVRReadMask |
uint32_t |
Receive oversize packet counter |
ROVRResetMask |
uint32_t |
Receive oversize packet counter |
ROVRResetValue |
uint32_t |
Receive oversize packet counter |
ROVRWriteMask |
uint32_t |
Receive oversize packet counter |
RPKT |
uint32_t |
Receive packet counter |
RPKTColdResetValue |
uint32_t |
Receive packet counter |
RPKTForcedBits |
uint32_t |
Receive packet counter |
RPKTForcedFlippedBits |
uint32_t |
Receive packet counter |
RPKTReadMask |
uint32_t |
Receive packet counter |
RPKTResetMask |
uint32_t |
Receive packet counter |
RPKTResetValue |
uint32_t |
Receive packet counter |
RPKTWriteMask |
uint32_t |
Receive packet counter |
RQFAR |
uint32_t |
Receive queue filing table address register |
RQFARColdResetValue |
uint32_t |
Receive queue filing table address register |
RQFARForcedBits |
uint32_t |
Receive queue filing table address register |
RQFARForcedFlippedBits |
uint32_t |
Receive queue filing table address register |
RQFARReadMask |
uint32_t |
Receive queue filing table address register |
RQFARResetMask |
uint32_t |
Receive queue filing table address register |
RQFARResetValue |
uint32_t |
Receive queue filing table address register |
RQFARWriteMask |
uint32_t |
Receive queue filing table address register |
RQFCR |
uint32_t |
Receive queue filing table control register |
RQFCRColdResetValue |
uint32_t |
Receive queue filing table control register |
RQFCRForcedBits |
uint32_t |
Receive queue filing table control register |
RQFCRForcedFlippedBits |
uint32_t |
Receive queue filing table control register |
RQFCRReadMask |
uint32_t |
Receive queue filing table control register |
RQFCRResetMask |
uint32_t |
Receive queue filing table control register |
RQFCRResetValue |
uint32_t |
Receive queue filing table control register |
RQFCRWriteMask |
uint32_t |
Receive queue filing table control register |
RQFPR |
uint32_t |
Receive queue filing table property register |
RQFPRColdResetValue |
uint32_t |
Receive queue filing table property register |
RQFPRForcedBits |
uint32_t |
Receive queue filing table property register |
RQFPRForcedFlippedBits |
uint32_t |
Receive queue filing table property register |
RQFPRReadMask |
uint32_t |
Receive queue filing table property register |
RQFPRResetMask |
uint32_t |
Receive queue filing table property register |
RQFPRResetValue |
uint32_t |
Receive queue filing table property register |
RQFPRWriteMask |
uint32_t |
Receive queue filing table property register |
RQPRM |
[uint32_t; 8] |
Receive queue parameters register |
RQUEUE |
uint32_t |
Receive queue control register |
RQUEUEColdResetValue |
uint32_t |
Receive queue control register |
RQUEUEForcedBits |
uint32_t |
Receive queue control register |
RQUEUEForcedFlippedBits |
uint32_t |
Receive queue control register |
RQUEUEReadMask |
uint32_t |
Receive queue control register |
RQUEUEResetMask |
uint32_t |
Receive queue control register |
RQUEUEResetValue |
uint32_t |
Receive queue control register |
RQUEUEWriteMask |
uint32_t |
Receive queue control register |
RREJ |
uint32_t |
Receive filer rejected packet counter |
RREJColdResetValue |
uint32_t |
Receive filer rejected packet counter |
RREJForcedBits |
uint32_t |
Receive filer rejected packet counter |
RREJForcedFlippedBits |
uint32_t |
Receive filer rejected packet counter |
RREJReadMask |
uint32_t |
Receive filer rejected packet counter |
RREJResetMask |
uint32_t |
Receive filer rejected packet counter |
RREJResetValue |
uint32_t |
Receive filer rejected packet counter |
RREJWriteMask |
uint32_t |
Receive filer rejected packet counter |
RSTAT |
uint32_t |
Receive status register |
RSTATColdResetValue |
uint32_t |
Receive status register |
RSTATForcedBits |
uint32_t |
Receive status register |
RSTATForcedFlippedBits |
uint32_t |
Receive status register |
RSTATReadMask |
uint32_t |
Receive status register |
RSTATResetMask |
uint32_t |
Receive status register |
RSTATResetValue |
uint32_t |
Receive status register |
RSTATWriteMask |
uint32_t |
Receive status register |
RUND |
uint32_t |
Receive undersize packet counter |
RUNDColdResetValue |
uint32_t |
Receive undersize packet counter |
RUNDForcedBits |
uint32_t |
Receive undersize packet counter |
RUNDForcedFlippedBits |
uint32_t |
Receive undersize packet counter |
RUNDReadMask |
uint32_t |
Receive undersize packet counter |
RUNDResetMask |
uint32_t |
Receive undersize packet counter |
RUNDResetValue |
uint32_t |
Receive undersize packet counter |
RUNDWriteMask |
uint32_t |
Receive undersize packet counter |
RXCF |
uint32_t |
Receive control frame counter |
RXCFColdResetValue |
uint32_t |
Receive control frame counter |
RXCFForcedBits |
uint32_t |
Receive control frame counter |
RXCFForcedFlippedBits |
uint32_t |
Receive control frame counter |
RXCFReadMask |
uint32_t |
Receive control frame counter |
RXCFResetMask |
uint32_t |
Receive control frame counter |
RXCFResetValue |
uint32_t |
Receive control frame counter |
RXCFWriteMask |
uint32_t |
Receive control frame counter |
RXIC |
uint32_t |
Receive interrupt coalescing register |
RXICColdResetValue |
uint32_t |
Receive interrupt coalescing register |
RXICForcedBits |
uint32_t |
Receive interrupt coalescing register |
RXICForcedFlippedBits |
uint32_t |
Receive interrupt coalescing register |
RXICReadMask |
uint32_t |
Receive interrupt coalescing register |
RXICResetMask |
uint32_t |
Receive interrupt coalescing register |
RXICResetValue |
uint32_t |
Receive interrupt coalescing register |
RXICWriteMask |
uint32_t |
Receive interrupt coalescing register |
RXPF |
uint32_t |
Receive PAUSE frame counter |
RXPFColdResetValue |
uint32_t |
Receive PAUSE frame counter |
RXPFForcedBits |
uint32_t |
Receive PAUSE frame counter |
RXPFForcedFlippedBits |
uint32_t |
Receive PAUSE frame counter |
RXPFReadMask |
uint32_t |
Receive PAUSE frame counter |
RXPFResetMask |
uint32_t |
Receive PAUSE frame counter |
RXPFResetValue |
uint32_t |
Receive PAUSE frame counter |
RXPFWriteMask |
uint32_t |
Receive PAUSE frame counter |
RXUO |
uint32_t |
Receive unknown opcode counter |
RXUOColdResetValue |
uint32_t |
Receive unknown opcode counter |
RXUOForcedBits |
uint32_t |
Receive unknown opcode counter |
RXUOForcedFlippedBits |
uint32_t |
Receive unknown opcode counter |
RXUOReadMask |
uint32_t |
Receive unknown opcode counter |
RXUOResetMask |
uint32_t |
Receive unknown opcode counter |
RXUOResetValue |
uint32_t |
Receive unknown opcode counter |
RXUOWriteMask |
uint32_t |
Receive unknown opcode counter |
ReplayLoggingFlags |
uint64_t |
Replay-time category logging flags |
TBASE |
[uint32_t; 8] |
TxBD base address of ring n |
TBASEH |
uint32_t |
TxBD base address high bits |
TBASEHColdResetValue |
uint32_t |
TxBD base address high bits |
TBASEHForcedBits |
uint32_t |
TxBD base address high bits |
TBASEHForcedFlippedBits |
uint32_t |
TxBD base address high bits |
TBASEHReadMask |
uint32_t |
TxBD base address high bits |
TBASEHResetMask |
uint32_t |
TxBD base address high bits |
TBASEHResetValue |
uint32_t |
TxBD base address high bits |
TBASEHWriteMask |
uint32_t |
TxBD base address high bits |
TBCA |
uint32_t |
Transmit broadcast packet counter |
TBCAColdResetValue |
uint32_t |
Transmit broadcast packet counter |
TBCAForcedBits |
uint32_t |
Transmit broadcast packet counter |
TBCAForcedFlippedBits |
uint32_t |
Transmit broadcast packet counter |
TBCAReadMask |
uint32_t |
Transmit broadcast packet counter |
TBCAResetMask |
uint32_t |
Transmit broadcast packet counter |
TBCAResetValue |
uint32_t |
Transmit broadcast packet counter |
TBCAWriteMask |
uint32_t |
Transmit broadcast packet counter |
TBDBPH |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHColdResetValue |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHForcedBits |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHForcedFlippedBits |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHReadMask |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHResetMask |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHResetValue |
uint32_t |
Tx data buffer pointer high bits |
TBDBPHWriteMask |
uint32_t |
Tx data buffer pointer high bits |
TBIPA |
uint32_t |
TBI PHY address register |
TBIPAColdResetValue |
uint32_t |
TBI PHY address register |
TBIPAForcedBits |
uint32_t |
TBI PHY address register |
TBIPAForcedFlippedBits |
uint32_t |
TBI PHY address register |
TBIPAReadMask |
uint32_t |
TBI PHY address register |
TBIPAResetMask |
uint32_t |
TBI PHY address register |
TBIPAResetValue |
uint32_t |
TBI PHY address register |
TBIPAWriteMask |
uint32_t |
TBI PHY address register |
TBPTR |
[uint32_t; 8] |
TxBD pointer for ring n |
TBYT |
uint32_t |
Transmit byte counter |
TBYTColdResetValue |
uint32_t |
Transmit byte counter |
TBYTForcedBits |
uint32_t |
Transmit byte counter |
TBYTForcedFlippedBits |
uint32_t |
Transmit byte counter |
TBYTReadMask |
uint32_t |
Transmit byte counter |
TBYTResetMask |
uint32_t |
Transmit byte counter |
TBYTResetValue |
uint32_t |
Transmit byte counter |
TBYTWriteMask |
uint32_t |
Transmit byte counter |
TCTRL |
uint32_t |
Transmit control register |
TCTRLColdResetValue |
uint32_t |
Transmit control register |
TCTRLForcedBits |
uint32_t |
Transmit control register |
TCTRLForcedFlippedBits |
uint32_t |
Transmit control register |
TCTRLReadMask |
uint32_t |
Transmit control register |
TCTRLResetMask |
uint32_t |
Transmit control register |
TCTRLResetValue |
uint32_t |
Transmit control register |
TCTRLWriteMask |
uint32_t |
Transmit control register |
TDFR |
uint32_t |
Transmit deferral packet counter |
TDFRColdResetValue |
uint32_t |
Transmit deferral packet counter |
TDFRForcedBits |
uint32_t |
Transmit deferral packet counter |
TDFRForcedFlippedBits |
uint32_t |
Transmit deferral packet counter |
TDFRReadMask |
uint32_t |
Transmit deferral packet counter |
TDFRResetMask |
uint32_t |
Transmit deferral packet counter |
TDFRResetValue |
uint32_t |
Transmit deferral packet counter |
TDFRWriteMask |
uint32_t |
Transmit deferral packet counter |
TDRP |
uint32_t |
Transmit drop frame counter |
TDRPColdResetValue |
uint32_t |
Transmit drop frame counter |
TDRPForcedBits |
uint32_t |
Transmit drop frame counter |
TDRPForcedFlippedBits |
uint32_t |
Transmit drop frame counter |
TDRPReadMask |
uint32_t |
Transmit drop frame counter |
TDRPResetMask |
uint32_t |
Transmit drop frame counter |
TDRPResetValue |
uint32_t |
Transmit drop frame counter |
TDRPWriteMask |
uint32_t |
Transmit drop frame counter |
TEDF |
uint32_t |
Transmit excessive deferral packet counter |
TEDFColdResetValue |
uint32_t |
Transmit excessive deferral packet counter |
TEDFForcedBits |
uint32_t |
Transmit excessive deferral packet counter |
TEDFForcedFlippedBits |
uint32_t |
Transmit excessive deferral packet counter |
TEDFReadMask |
uint32_t |
Transmit excessive deferral packet counter |
TEDFResetMask |
uint32_t |
Transmit excessive deferral packet counter |
TEDFResetValue |
uint32_t |
Transmit excessive deferral packet counter |
TEDFWriteMask |
uint32_t |
Transmit excessive deferral packet counter |
TFCS |
uint32_t |
Transmit FCS error counter |
TFCSColdResetValue |
uint32_t |
Transmit FCS error counter |
TFCSForcedBits |
uint32_t |
Transmit FCS error counter |
TFCSForcedFlippedBits |
uint32_t |
Transmit FCS error counter |
TFCSReadMask |
uint32_t |
Transmit FCS error counter |
TFCSResetMask |
uint32_t |
Transmit FCS error counter |
TFCSResetValue |
uint32_t |
Transmit FCS error counter |
TFCSWriteMask |
uint32_t |
Transmit FCS error counter |
TFRG |
uint32_t |
Transmit fragments frame counter |
TFRGColdResetValue |
uint32_t |
Transmit fragments frame counter |
TFRGForcedBits |
uint32_t |
Transmit fragments frame counter |
TFRGForcedFlippedBits |
uint32_t |
Transmit fragments frame counter |
TFRGReadMask |
uint32_t |
Transmit fragments frame counter |
TFRGResetMask |
uint32_t |
Transmit fragments frame counter |
TFRGResetValue |
uint32_t |
Transmit fragments frame counter |
TFRGWriteMask |
uint32_t |
Transmit fragments frame counter |
TJBR |
uint32_t |
Transmit jabber frame counter |
TJBRColdResetValue |
uint32_t |
Transmit jabber frame counter |
TJBRForcedBits |
uint32_t |
Transmit jabber frame counter |
TJBRForcedFlippedBits |
uint32_t |
Transmit jabber frame counter |
TJBRReadMask |
uint32_t |
Transmit jabber frame counter |
TJBRResetMask |
uint32_t |
Transmit jabber frame counter |
TJBRResetValue |
uint32_t |
Transmit jabber frame counter |
TJBRWriteMask |
uint32_t |
Transmit jabber frame counter |
TLCL |
uint32_t |
Transmit late collision packet counter |
TLCLColdResetValue |
uint32_t |
Transmit late collision packet counter |
TLCLForcedBits |
uint32_t |
Transmit late collision packet counter |
TLCLForcedFlippedBits |
uint32_t |
Transmit late collision packet counter |
TLCLReadMask |
uint32_t |
Transmit late collision packet counter |
TLCLResetMask |
uint32_t |
Transmit late collision packet counter |
TLCLResetValue |
uint32_t |
Transmit late collision packet counter |
TLCLWriteMask |
uint32_t |
Transmit late collision packet counter |
TMCA |
uint32_t |
Transmit multicast packet counter |
TMCAColdResetValue |
uint32_t |
Transmit multicast packet counter |
TMCAForcedBits |
uint32_t |
Transmit multicast packet counter |
TMCAForcedFlippedBits |
uint32_t |
Transmit multicast packet counter |
TMCAReadMask |
uint32_t |
Transmit multicast packet counter |
TMCAResetMask |
uint32_t |
Transmit multicast packet counter |
TMCAResetValue |
uint32_t |
Transmit multicast packet counter |
TMCAWriteMask |
uint32_t |
Transmit multicast packet counter |
TMCL |
uint32_t |
Transmit multi collision packet counter |
TMCLColdResetValue |
uint32_t |
Transmit multi collision packet counter |
TMCLForcedBits |
uint32_t |
Transmit multi collision packet counter |
TMCLForcedFlippedBits |
uint32_t |
Transmit multi collision packet counter |
TMCLReadMask |
uint32_t |
Transmit multi collision packet counter |
TMCLResetMask |
uint32_t |
Transmit multi collision packet counter |
TMCLResetValue |
uint32_t |
Transmit multi collision packet counter |
TMCLWriteMask |
uint32_t |
Transmit multi collision packet counter |
TMROFF_H |
uint32_t |
Timer offset high register |
TMROFF_HColdResetValue |
uint32_t |
Timer offset high register |
TMROFF_HForcedBits |
uint32_t |
Timer offset high register |
TMROFF_HForcedFlippedBits |
uint32_t |
Timer offset high register |
TMROFF_HReadMask |
uint32_t |
Timer offset high register |
TMROFF_HResetMask |
uint32_t |
Timer offset high register |
TMROFF_HResetValue |
uint32_t |
Timer offset high register |
TMROFF_HWriteMask |
uint32_t |
Timer offset high register |
TMROFF_L |
uint32_t |
Timer offset low register |
TMROFF_LColdResetValue |
uint32_t |
Timer offset low register |
TMROFF_LForcedBits |
uint32_t |
Timer offset low register |
TMROFF_LForcedFlippedBits |
uint32_t |
Timer offset low register |
TMROFF_LReadMask |
uint32_t |
Timer offset low register |
TMROFF_LResetMask |
uint32_t |
Timer offset low register |
TMROFF_LResetValue |
uint32_t |
Timer offset low register |
TMROFF_LWriteMask |
uint32_t |
Timer offset low register |
TMR_ACC |
uint32_t |
Timer accumulator register |
TMR_ACCColdResetValue |
uint32_t |
Timer accumulator register |
TMR_ACCForcedBits |
uint32_t |
Timer accumulator register |
TMR_ACCForcedFlippedBits |
uint32_t |
Timer accumulator register |
TMR_ACCReadMask |
uint32_t |
Timer accumulator register |
TMR_ACCResetMask |
uint32_t |
Timer accumulator register |
TMR_ACCResetValue |
uint32_t |
Timer accumulator register |
TMR_ACCWriteMask |
uint32_t |
Timer accumulator register |
TMR_ADD |
uint32_t |
Timer drift compensation addend register |
TMR_ADDColdResetValue |
uint32_t |
Timer drift compensation addend register |
TMR_ADDForcedBits |
uint32_t |
Timer drift compensation addend register |
TMR_ADDForcedFlippedBits |
uint32_t |
Timer drift compensation addend register |
TMR_ADDReadMask |
uint32_t |
Timer drift compensation addend register |
TMR_ADDResetMask |
uint32_t |
Timer drift compensation addend register |
TMR_ADDResetValue |
uint32_t |
Timer drift compensation addend register |
TMR_ADDWriteMask |
uint32_t |
Timer drift compensation addend register |
TMR_ALARM_H |
[uint32_t; 2] |
Timer alarm high register |
TMR_ALARM_L |
[uint32_t; 2] |
Timer alarm low register |
TMR_CNT_H |
uint32_t |
Timer counter high register |
TMR_CNT_HColdResetValue |
uint32_t |
Timer counter high register |
TMR_CNT_HForcedBits |
uint32_t |
Timer counter high register |
TMR_CNT_HForcedFlippedBits |
uint32_t |
Timer counter high register |
TMR_CNT_HReadMask |
uint32_t |
Timer counter high register |
TMR_CNT_HResetMask |
uint32_t |
Timer counter high register |
TMR_CNT_HResetValue |
uint32_t |
Timer counter high register |
TMR_CNT_HWriteMask |
uint32_t |
Timer counter high register |
TMR_CNT_L |
uint32_t |
Timer counter low register |
TMR_CNT_LColdResetValue |
uint32_t |
Timer counter low register |
TMR_CNT_LForcedBits |
uint32_t |
Timer counter low register |
TMR_CNT_LForcedFlippedBits |
uint32_t |
Timer counter low register |
TMR_CNT_LReadMask |
uint32_t |
Timer counter low register |
TMR_CNT_LResetMask |
uint32_t |
Timer counter low register |
TMR_CNT_LResetValue |
uint32_t |
Timer counter low register |
TMR_CNT_LWriteMask |
uint32_t |
Timer counter low register |
TMR_CTRL |
uint32_t |
Timer control register |
TMR_CTRLColdResetValue |
uint32_t |
Timer control register |
TMR_CTRLForcedBits |
uint32_t |
Timer control register |
TMR_CTRLForcedFlippedBits |
uint32_t |
Timer control register |
TMR_CTRLReadMask |
uint32_t |
Timer control register |
TMR_CTRLResetMask |
uint32_t |
Timer control register |
TMR_CTRLResetValue |
uint32_t |
Timer control register |
TMR_CTRLWriteMask |
uint32_t |
Timer control register |
TMR_ETTS_H |
[uint32_t; 2] |
External trigger timestamp high register |
TMR_ETTS_L |
[uint32_t; 2] |
External trigger timestamp low register |
TMR_FIPER |
[uint32_t; 2] |
Timer fixed period interval register |
TMR_PEMASK |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKColdResetValue |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKForcedBits |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKForcedFlippedBits |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKReadMask |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKResetMask |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKResetValue |
uint32_t |
PTP time stamp event mask register |
TMR_PEMASKWriteMask |
uint32_t |
PTP time stamp event mask register |
TMR_PEVENT |
uint32_t |
PTP time stamp event register |
TMR_PEVENTColdResetValue |
uint32_t |
PTP time stamp event register |
TMR_PEVENTForcedBits |
uint32_t |
PTP time stamp event register |
TMR_PEVENTForcedFlippedBits |
uint32_t |
PTP time stamp event register |
TMR_PEVENTReadMask |
uint32_t |
PTP time stamp event register |
TMR_PEVENTResetMask |
uint32_t |
PTP time stamp event register |
TMR_PEVENTResetValue |
uint32_t |
PTP time stamp event register |
TMR_PEVENTWriteMask |
uint32_t |
PTP time stamp event register |
TMR_PRSC |
uint32_t |
Timer prescale register |
TMR_PRSCColdResetValue |
uint32_t |
Timer prescale register |
TMR_PRSCForcedBits |
uint32_t |
Timer prescale register |
TMR_PRSCForcedFlippedBits |
uint32_t |
Timer prescale register |
TMR_PRSCReadMask |
uint32_t |
Timer prescale register |
TMR_PRSCResetMask |
uint32_t |
Timer prescale register |
TMR_PRSCResetValue |
uint32_t |
Timer prescale register |
TMR_PRSCWriteMask |
uint32_t |
Timer prescale register |
TMR_RXTS_H |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HColdResetValue |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HForcedBits |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HForcedFlippedBits |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HReadMask |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HResetMask |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HResetValue |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_HWriteMask |
uint32_t |
Rx timer time stamp high |
TMR_RXTS_L |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LColdResetValue |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LForcedBits |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LForcedFlippedBits |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LReadMask |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LResetMask |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LResetValue |
uint32_t |
Rx timer time stamp low |
TMR_RXTS_LWriteMask |
uint32_t |
Rx timer time stamp low |
TMR_STAT |
uint32_t |
Time stamp status register |
TMR_STATColdResetValue |
uint32_t |
Time stamp status register |
TMR_STATForcedBits |
uint32_t |
Time stamp status register |
TMR_STATForcedFlippedBits |
uint32_t |
Time stamp status register |
TMR_STATReadMask |
uint32_t |
Time stamp status register |
TMR_STATResetMask |
uint32_t |
Time stamp status register |
TMR_STATResetValue |
uint32_t |
Time stamp status register |
TMR_STATWriteMask |
uint32_t |
Time stamp status register |
TMR_TEMASK |
uint32_t |
Timer event mask register |
TMR_TEMASKColdResetValue |
uint32_t |
Timer event mask register |
TMR_TEMASKForcedBits |
uint32_t |
Timer event mask register |
TMR_TEMASKForcedFlippedBits |
uint32_t |
Timer event mask register |
TMR_TEMASKReadMask |
uint32_t |
Timer event mask register |
TMR_TEMASKResetMask |
uint32_t |
Timer event mask register |
TMR_TEMASKResetValue |
uint32_t |
Timer event mask register |
TMR_TEMASKWriteMask |
uint32_t |
Timer event mask register |
TMR_TEVENT |
uint32_t |
Time stamp event register |
TMR_TEVENTColdResetValue |
uint32_t |
Time stamp event register |
TMR_TEVENTForcedBits |
uint32_t |
Time stamp event register |
TMR_TEVENTForcedFlippedBits |
uint32_t |
Time stamp event register |
TMR_TEVENTReadMask |
uint32_t |
Time stamp event register |
TMR_TEVENTResetMask |
uint32_t |
Time stamp event register |
TMR_TEVENTResetValue |
uint32_t |
Time stamp event register |
TMR_TEVENTWriteMask |
uint32_t |
Time stamp event register |
TMR_TXTS_H |
[uint32_t; 2] |
Tx time stamp high |
TMR_TXTS_ID |
[uint32_t; 2] |
Tx time stamp identification tag register |
TMR_TXTS_L |
[uint32_t; 2] |
Tx time stamp low |
TNCL |
uint32_t |
Transmit total collision packet counter |
TNCLColdResetValue |
uint32_t |
Transmit total collision packet counter |
TNCLForcedBits |
uint32_t |
Transmit total collision packet counter |
TNCLForcedFlippedBits |
uint32_t |
Transmit total collision packet counter |
TNCLReadMask |
uint32_t |
Transmit total collision packet counter |
TNCLResetMask |
uint32_t |
Transmit total collision packet counter |
TNCLResetValue |
uint32_t |
Transmit total collision packet counter |
TNCLWriteMask |
uint32_t |
Transmit total collision packet counter |
TOVR |
uint32_t |
Transmit oversize frame counter |
TOVRColdResetValue |
uint32_t |
Transmit oversize frame counter |
TOVRForcedBits |
uint32_t |
Transmit oversize frame counter |
TOVRForcedFlippedBits |
uint32_t |
Transmit oversize frame counter |
TOVRReadMask |
uint32_t |
Transmit oversize frame counter |
TOVRResetMask |
uint32_t |
Transmit oversize frame counter |
TOVRResetValue |
uint32_t |
Transmit oversize frame counter |
TOVRWriteMask |
uint32_t |
Transmit oversize frame counter |
TPKT |
uint32_t |
Transmit packet counter |
TPKTColdResetValue |
uint32_t |
Transmit packet counter |
TPKTForcedBits |
uint32_t |
Transmit packet counter |
TPKTForcedFlippedBits |
uint32_t |
Transmit packet counter |
TPKTReadMask |
uint32_t |
Transmit packet counter |
TPKTResetMask |
uint32_t |
Transmit packet counter |
TPKTResetValue |
uint32_t |
Transmit packet counter |
TPKTWriteMask |
uint32_t |
Transmit packet counter |
TQUEUE |
uint32_t |
Transmit queue control register |
TQUEUEColdResetValue |
uint32_t |
Transmit queue control register |
TQUEUEForcedBits |
uint32_t |
Transmit queue control register |
TQUEUEForcedFlippedBits |
uint32_t |
Transmit queue control register |
TQUEUEReadMask |
uint32_t |
Transmit queue control register |
TQUEUEResetMask |
uint32_t |
Transmit queue control register |
TQUEUEResetValue |
uint32_t |
Transmit queue control register |
TQUEUEWriteMask |
uint32_t |
Transmit queue control register |
TR03WT |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTColdResetValue |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTForcedBits |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTForcedFlippedBits |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTReadMask |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTResetMask |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTResetValue |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR03WTWriteMask |
uint32_t |
TxBD rings 0-3 round-robin weightings |
TR127 |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ColdResetValue |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ForcedBits |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ForcedFlippedBits |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ReadMask |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ResetMask |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127ResetValue |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR127WriteMask |
uint32_t |
Transmit and receive 65- to 127-byte frame counter |
TR1K |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KColdResetValue |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KForcedBits |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KForcedFlippedBits |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KReadMask |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KResetMask |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KResetValue |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR1KWriteMask |
uint32_t |
Transmit and receive 512- to 1023-byte frame counter |
TR255 |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ColdResetValue |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ForcedBits |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ForcedFlippedBits |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ReadMask |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ResetMask |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255ResetValue |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR255WriteMask |
uint32_t |
Transmit and receive 128- to 255-byte frame counter |
TR47WT |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTColdResetValue |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTForcedBits |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTForcedFlippedBits |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTReadMask |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTResetMask |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTResetValue |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR47WTWriteMask |
uint32_t |
TxBD rings 4-7 round-robin weightings |
TR511 |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ColdResetValue |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ForcedBits |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ForcedFlippedBits |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ReadMask |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ResetMask |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511ResetValue |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR511WriteMask |
uint32_t |
Transmit and receive 256- to 511-byte frame counter |
TR64 |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ColdResetValue |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ForcedBits |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ForcedFlippedBits |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ReadMask |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ResetMask |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64ResetValue |
uint32_t |
Transmit and receive 64-byte frame counter |
TR64WriteMask |
uint32_t |
Transmit and receive 64-byte frame counter |
TRMAX |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXColdResetValue |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXForcedBits |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXForcedFlippedBits |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXReadMask |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXResetMask |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXResetValue |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMAXWriteMask |
uint32_t |
Transmit and receive 1024- to 1518-byte frame counter |
TRMGV |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVColdResetValue |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVForcedBits |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVForcedFlippedBits |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVReadMask |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVResetMask |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVResetValue |
uint32_t |
Transmit and receive good VLAN frame counter |
TRMGVWriteMask |
uint32_t |
Transmit and receive good VLAN frame counter |
TSCL |
uint32_t |
Transmit single collision packet counter |
TSCLColdResetValue |
uint32_t |
Transmit single collision packet counter |
TSCLForcedBits |
uint32_t |
Transmit single collision packet counter |
TSCLForcedFlippedBits |
uint32_t |
Transmit single collision packet counter |
TSCLReadMask |
uint32_t |
Transmit single collision packet counter |
TSCLResetMask |
uint32_t |
Transmit single collision packet counter |
TSCLResetValue |
uint32_t |
Transmit single collision packet counter |
TSCLWriteMask |
uint32_t |
Transmit single collision packet counter |
TSEC_ID |
uint32_t |
Controller ID register |
TSEC_ID2 |
uint32_t |
Controller ID register 2 |
TSEC_ID2ColdResetValue |
uint32_t |
Controller ID register 2 |
TSEC_ID2ForcedBits |
uint32_t |
Controller ID register 2 |
TSEC_ID2ForcedFlippedBits |
uint32_t |
Controller ID register 2 |
TSEC_ID2ReadMask |
uint32_t |
Controller ID register 2 |
TSEC_ID2ResetMask |
uint32_t |
Controller ID register 2 |
TSEC_ID2ResetValue |
uint32_t |
Controller ID register 2 |
TSEC_ID2WriteMask |
uint32_t |
Controller ID register 2 |
TSEC_IDColdResetValue |
uint32_t |
Controller ID register |
TSEC_IDForcedBits |
uint32_t |
Controller ID register |
TSEC_IDForcedFlippedBits |
uint32_t |
Controller ID register |
TSEC_IDReadMask |
uint32_t |
Controller ID register |
TSEC_IDResetMask |
uint32_t |
Controller ID register |
TSEC_IDResetValue |
uint32_t |
Controller ID register |
TSEC_IDWriteMask |
uint32_t |
Controller ID register |
TSTAT |
uint32_t |
Transmit status register |
TSTATColdResetValue |
uint32_t |
Transmit status register |
TSTATForcedBits |
uint32_t |
Transmit status register |
TSTATForcedFlippedBits |
uint32_t |
Transmit status register |
TSTATReadMask |
uint32_t |
Transmit status register |
TSTATResetMask |
uint32_t |
Transmit status register |
TSTATResetValue |
uint32_t |
Transmit status register |
TSTATWriteMask |
uint32_t |
Transmit status register |
TUND |
uint32_t |
Transmit undersize frame counter |
TUNDColdResetValue |
uint32_t |
Transmit undersize frame counter |
TUNDForcedBits |
uint32_t |
Transmit undersize frame counter |
TUNDForcedFlippedBits |
uint32_t |
Transmit undersize frame counter |
TUNDReadMask |
uint32_t |
Transmit undersize frame counter |
TUNDResetMask |
uint32_t |
Transmit undersize frame counter |
TUNDResetValue |
uint32_t |
Transmit undersize frame counter |
TUNDWriteMask |
uint32_t |
Transmit undersize frame counter |
TXCF |
uint32_t |
Transmit control frame counter |
TXCFColdResetValue |
uint32_t |
Transmit control frame counter |
TXCFForcedBits |
uint32_t |
Transmit control frame counter |
TXCFForcedFlippedBits |
uint32_t |
Transmit control frame counter |
TXCFReadMask |
uint32_t |
Transmit control frame counter |
TXCFResetMask |
uint32_t |
Transmit control frame counter |
TXCFResetValue |
uint32_t |
Transmit control frame counter |
TXCFWriteMask |
uint32_t |
Transmit control frame counter |
TXCL |
uint32_t |
Transmit excessive collision packet counter |
TXCLColdResetValue |
uint32_t |
Transmit excessive collision packet counter |
TXCLForcedBits |
uint32_t |
Transmit excessive collision packet counter |
TXCLForcedFlippedBits |
uint32_t |
Transmit excessive collision packet counter |
TXCLReadMask |
uint32_t |
Transmit excessive collision packet counter |
TXCLResetMask |
uint32_t |
Transmit excessive collision packet counter |
TXCLResetValue |
uint32_t |
Transmit excessive collision packet counter |
TXCLWriteMask |
uint32_t |
Transmit excessive collision packet counter |
TXIC |
uint32_t |
Transmit interrupt coalescing register |
TXICColdResetValue |
uint32_t |
Transmit interrupt coalescing register |
TXICForcedBits |
uint32_t |
Transmit interrupt coalescing register |
TXICForcedFlippedBits |
uint32_t |
Transmit interrupt coalescing register |
TXICReadMask |
uint32_t |
Transmit interrupt coalescing register |
TXICResetMask |
uint32_t |
Transmit interrupt coalescing register |
TXICResetValue |
uint32_t |
Transmit interrupt coalescing register |
TXICWriteMask |
uint32_t |
Transmit interrupt coalescing register |
TXPF |
uint32_t |
Transmit PAUSE control frame counter |
TXPFColdResetValue |
uint32_t |
Transmit PAUSE control frame counter |
TXPFForcedBits |
uint32_t |
Transmit PAUSE control frame counter |
TXPFForcedFlippedBits |
uint32_t |
Transmit PAUSE control frame counter |
TXPFReadMask |
uint32_t |
Transmit PAUSE control frame counter |
TXPFResetMask |
uint32_t |
Transmit PAUSE control frame counter |
TXPFResetValue |
uint32_t |
Transmit PAUSE control frame counter |
TXPFWriteMask |
uint32_t |
Transmit PAUSE control frame counter |
TimeSource |
*void |
Time source object |
config.checkCrc |
uint8_t |
Enable ethernet frame CRC checking. |
config.generateCrc |
uint8_t |
Enable ethernet frame CRC generation. |
config.interfaceMode |
uint8_t |
Set interface mode |
config.irqError |
uint8_t |
IRQ number for eTSEC error |
config.irqReceive |
uint8_t |
IRQ number for eTSEC receieve event |
config.irqTransmit |
uint8_t |
IRQ number for eTSEC transmit event |
config.logRegisterAccess |
uint8_t |
Enable logging of register accesses |
config.logTraffic |
uint8_t |
Enable traffic logging |
irqCtrl |
temu_IfaceRef/ <unknown> |
IRQ controller |
mac |
*char |
Set MAC by string |
mdioBus |
temu_IfaceRef/ <unknown> |
MDIO bus |
memAccess |
temu_IfaceRef/ <unknown> |
Memory access (for DMA). |
phy |
temu_IfaceRef/ <unknown> |
PHY device |
state.GracefulTransmitStopDone |
uint8_t |
Graceful transmit-stop completed flag |