GRLIB SPICTRL Model

The SPICTRL device is part of the GRLIB IP library. It is available in libTEMUSPICTRL.so.

Loading the Plugin

import SPICTRL

Configuration

After instantiating an object set the capability registers to the desired configuration. Do not change the capability registers during operation.

@SPICTRL Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @SPICTRL

new

Create new instance of SPICTRL

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

SPICTRL Reference

Properties

Name Type Description

AMCFG

uint32_t

AM configuration register

AMCFGColdResetValue

uint32_t

AM configuration register

AMCFGForcedBits

uint32_t

AM configuration register

AMCFGForcedFlippedBits

uint32_t

AM configuration register

AMCFGReadMask

uint32_t

AM configuration register

AMCFGResetMask

uint32_t

AM configuration register

AMCFGResetValue

uint32_t

AM configuration register

AMCFGWriteMask

uint32_t

AM configuration register

AMPER

uint32_t

AM period register

AMPERColdResetValue

uint32_t

AM period register

AMPERForcedBits

uint32_t

AM period register

AMPERForcedFlippedBits

uint32_t

AM period register

AMPERReadMask

uint32_t

AM period register

AMPERResetMask

uint32_t

AM period register

AMPERResetValue

uint32_t

AM period register

AMPERWriteMask

uint32_t

AM period register

ASLVSEL

uint32_t

Automatic slave select register

ASLVSELColdResetValue

uint32_t

Automatic slave select register

ASLVSELForcedBits

uint32_t

Automatic slave select register

ASLVSELForcedFlippedBits

uint32_t

Automatic slave select register

ASLVSELReadMask

uint32_t

Automatic slave select register

ASLVSELResetMask

uint32_t

Automatic slave select register

ASLVSELResetValue

uint32_t

Automatic slave select register

ASLVSELWriteMask

uint32_t

Automatic slave select register

CAP0

uint32_t

Capability register 0

CAP1

uint32_t

Capability register 1

CAP2ColdResetValue

uint32_t

Capability register 1

CAP2ForcedBits

uint32_t

Capability register 1

CAP2ForcedFlippedBits

uint32_t

Capability register 1

CAP2ReadMask

uint32_t

Capability register 1

CAP2ResetMask

uint32_t

Capability register 1

CAP2ResetValue

uint32_t

Capability register 1

CAP2WriteMask

uint32_t

Capability register 1

CAPColdResetValue

uint32_t

Capability register 0

CAPForcedBits

uint32_t

Capability register 0

CAPForcedFlippedBits

uint32_t

Capability register 0

CAPReadMask

uint32_t

Capability register 0

CAPResetMask

uint32_t

Capability register 0

CAPResetValue

uint32_t

Capability register 0

CAPWriteMask

uint32_t

Capability register 0

CMD

uint32_t

Command register

CMDColdResetValue

uint32_t

Command register

CMDForcedBits

uint32_t

Command register

CMDForcedFlippedBits

uint32_t

Command register

CMDReadMask

uint32_t

Command register

CMDResetMask

uint32_t

Command register

CMDResetValue

uint32_t

Command register

CMDWriteMask

uint32_t

Command register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

EVENT

uint32_t

Event register

EVENTColdResetValue

uint32_t

Event register

EVENTForcedBits

uint32_t

Event register

EVENTForcedFlippedBits

uint32_t

Event register

EVENTReadMask

uint32_t

Event register

EVENTResetMask

uint32_t

Event register

EVENTResetValue

uint32_t

Event register

EVENTWriteMask

uint32_t

Event register

LocalName

*char

Local name (in component, if applicable)

LogMessageFlags

uint64_t

Per-object log message suppression flags

LoggingFlags

uint64_t

Flags for logging info

MASK

uint32_t

Mask register

MASKColdResetValue

uint32_t

Mask register

MASKForcedBits

uint32_t

Mask register

MASKForcedFlippedBits

uint32_t

Mask register

MASKReadMask

uint32_t

Mask register

MASKResetMask

uint32_t

Mask register

MASKResetValue

uint32_t

Mask register

MASKWriteMask

uint32_t

Mask register

MODE

uint32_t

Mode register

MODEColdResetValue

uint32_t

Mode register

MODEForcedBits

uint32_t

Mode register

MODEForcedFlippedBits

uint32_t

Mode register

MODEReadMask

uint32_t

Mode register

MODEResetMask

uint32_t

Mode register

MODEResetValue

uint32_t

Mode register

MODEWriteMask

uint32_t

Mode register

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

RXC

uint32_t

Receive register

RXCColdResetValue

uint32_t

Receive register

RXCForcedBits

uint32_t

Receive register

RXCForcedFlippedBits

uint32_t

Receive register

RXCReadMask

uint32_t

Receive register

RXCResetMask

uint32_t

Receive register

RXCResetValue

uint32_t

Receive register

RXCWriteMask

uint32_t

Receive register

ReplayLoggingFlags

uint64_t

Replay-time category logging flags

Rx/TxFifo

[temu_Vector; 2]

Rx/TxFifo queues

SLVSEL

uint32_t

Slave select register

SLVSELColdResetValue

uint32_t

Slave select register

SLVSELForcedBits

uint32_t

Slave select register

SLVSELForcedFlippedBits

uint32_t

Slave select register

SLVSELReadMask

uint32_t

Slave select register

SLVSELResetMask

uint32_t

Slave select register

SLVSELResetValue

uint32_t

Slave select register

SLVSELWriteMask

uint32_t

Slave select register

TX

uint32_t

Transmit register

TXColdResetValue

uint32_t

Transmit register

TXForcedBits

uint32_t

Transmit register

TXForcedFlippedBits

uint32_t

Transmit register

TXReadMask

uint32_t

Transmit register

TXResetMask

uint32_t

Transmit register

TXResetValue

uint32_t

Transmit register

TXWriteMask

uint32_t

Transmit register

TimeSource

*void

Time source object

chipNumber

uint8_t

chipSelect ID of the device

config.irq

uint8_t

Interrupt number

irqCtrl

temu_IfaceRef/ <unknown>

IRQ controller.

pnp.bar

uint32_t

AMBA plug and play base address register

pnp.config

uint32_t

AMBA plug and play config word

spiBus

temu_IfaceRef/ <unknown>

Spi bus

Interfaces

Name Type Description

ApbIface

ApbIface

APB P&P interface.

DeviceIface

DeviceIface

MemAccessIface

MemAccessIface

RegisterIface

temu::RegisterIface

Auto-generated Register Interface Impl.

SpiSlaveDevice2Iface

temu::SpiSlaveDevice2Iface

Communication interface.

Registers

Register support is currently experimental!

Register Bank Regs

Register CAP
Description

Capability register 0

Reset value

0x020b0485

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

SSSZ

0xff000000

0x2

Slave Select register size

MAXWLEN

0x00f00000

0x0

Maximum word length

TWEN

0x00080000

0x1

Three-wire mode enable

AMODE

0x00040000

0x0

Auto mode

ASELA

0x00020000

0x1

Automatic slave select available

SSEN

0x00010000

0x1

Slave Select enable

FDEPTH

0x0000ff00

0x4

FIFO depth

SR

0x00000080

0x1

Syncram

FT

0x00000060

0x0

Fault-tolerance

REV

0x0000001f

0x5

Core revision
Register CAP2
Description

Capability register 1

Reset value

0x00000000

Warm reset mask

0x00000003

Diagram
Field Mask Reset Description

PROT

0x00000003

0x0

Supported protocol
Register MODE
Description

Mode register

Reset value

0x00000000

Warm reset mask

0x7ffffffe

Diagram
Field Mask Reset Description

LOOP

0x40000000

0x0

Loop mode

CPOL

0x20000000

0x0

Clock polarity

CPHA

0x10000000

0x0

Clock phase

DIV16

0x08000000

0x0

Divide by 16

REV

0x04000000

0x0

Reverse data

MS

0x02000000

0x0

Master/Slave

EN

0x01000000

0x0

Enable core

LEN

0x00f00000

0x0

Word length

PM

0x000f0000

0x0

Prescale modulus

TW

0x00008000

0x0

Three-wire mode

ASEL

0x00004000

0x0

Automatic slave select

FACT

0x00002000

0x0

PM factor

OD

0x00001000

0x0

Open drain mode

CG

0x00000f80

0x0

Clock gap

ASELDEL

0x00000060

0x0

Automatic slave select delay

TAC

0x00000010

0x0

Toggle automatic slave select during clock gap

TTO

0x00000008

0x0

3-wire transfer order

IGSEL

0x00000004

0x0

Ignore SPISEL input

CITE

0x00000002

0x0

Require clock idle for transfer end
Register EVENT
Description

Event register

Reset value

0x00000000

Warm reset mask

0x80000300

Diagram
Field Mask Reset Description

TIP

0x80000000

0x0

Transfer in progress

LT

0x00004000

-

Last character

OV

0x00001000

-

Overrun

UN

0x00000800

-

Underrun

MME

0x00000400

-

Multiple-master error

NE

0x00000200

0x0

Not empty

NF

0x00000100

0x0

Not full
Register MASK
Description

Mask register

Reset value

0x00000000

Warm reset mask

0x80005f00

Diagram
Field Mask Reset Description

TIPE

0x80000000

0x0

Transfer in progress enable

LTE

0x00004000

0x0

Last character enable

OVE

0x00001000

0x0

Overrun enable

UNE

0x00000800

0x0

Underrun enable

MMEE

0x00000400

0x0

Multiple-master error enable

NEE

0x00000200

0x0

Not empty enable

NFE

0x00000100

0x0

Not full enable
Register CMD
Description

Command register

Reset value

0x00000000

Warm reset mask

0x00000007

Diagram
Field Mask Reset Description

LST

0x00400000

-

Last

PGRD

0x00000008

-

Protocol guard

DIR

0x00000004

0x0

Direction

SPROT

0x00000003

0x0

SPI protocol
Register TX
Description

Transmit register

Reset value

0x00000000

Warm reset mask

0x00000000

Diagram
Field Mask Reset Description

TDATA

0xffffffff

-

Transmit data
Register RXC
Description

Receive register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

RDATA

0xffffffff

0x0

Receive data
Register SLVSEL
Description

Slave select register

Reset value

0x00000000

Warm reset mask

0x00000003

Diagram
Field Mask Reset Description

SLVSEL

0x00000003

0x0

Slave select
Register ASLVSEL
Description

Automatic slave select register

Reset value

0x00000000

Warm reset mask

0x00000003

Diagram
Field Mask Reset Description

ASLVSEL

0x00000003

0x0

Automatic slave select
Register AMCFG
Description

AM configuration register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

AMCFG

0xffffffff

0x0

Automatic mode configuration
Register AMPER
Description

AM period register

Reset value

0x00000000

Warm reset mask

0xffffffff

Diagram
Field Mask Reset Description

AMPER

0xffffffff

0x0

Automatic mode period

Commands

Name Description

delete

Dispose instance of SPICTRL

Limitations

  • Transmission delays and other timing effects are not modelled

  • The Slave Select functionality is not implemented

  • Automated periodic transfers are not implemented

  • Fault tolerance capabilities are not modelled