GRLIB GRSPFI Model

The GRSPFI device is part of the GRLIB IP library. It is available in libTEMUGRSPFI.so.

Loading the Plugin

import GRSPFI

Configuration

@GRSPFI Reference

Properties

Name Type Description

Class

*void

Class object

Component

*void

Pointer to component object if part of component

LocalName

*char

Local name (in component, if applicable)

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

TimeSource

*void

Time source object

Commands

Name Description

delete

Dispose instance of @GRSPFI

new

Create new instance of GRSPFI

Command new Arguments

Name Type Required Description

name

string

yes

Name of object to create

GRSPFI Reference

Properties

Name Type Description

BCCONF

uint32_t

Broadcast Channel Configuration Register

BCCONFColdResetValue

uint32_t

Broadcast Channel Configuration Register

BCCONFForcedBits

uint32_t

Broadcast Channel Configuration Register

BCCONFForcedFlippedBits

uint32_t

Broadcast Channel Configuration Register

BCCONFReadMask

uint32_t

Broadcast Channel Configuration Register

BCCONFResetMask

uint32_t

Broadcast Channel Configuration Register

BCCONFResetValue

uint32_t

Broadcast Channel Configuration Register

BCCONFWriteMask

uint32_t

Broadcast Channel Configuration Register

BCMAP

uint32_t

Broadcast Channel Mapping Register

BCMAPColdResetValue

uint32_t

Broadcast Channel Mapping Register

BCMAPForcedBits

uint32_t

Broadcast Channel Mapping Register

BCMAPForcedFlippedBits

uint32_t

Broadcast Channel Mapping Register

BCMAPReadMask

uint32_t

Broadcast Channel Mapping Register

BCMAPResetMask

uint32_t

Broadcast Channel Mapping Register

BCMAPResetValue

uint32_t

Broadcast Channel Mapping Register

BCMAPWriteMask

uint32_t

Broadcast Channel Mapping Register

BCRXADDR

uint32_t

Broadcast Channel RX Address Register

BCRXADDRColdResetValue

uint32_t

Broadcast Channel RX Address Register

BCRXADDRForcedBits

uint32_t

Broadcast Channel RX Address Register

BCRXADDRForcedFlippedBits

uint32_t

Broadcast Channel RX Address Register

BCRXADDRReadMask

uint32_t

Broadcast Channel RX Address Register

BCRXADDRResetMask

uint32_t

Broadcast Channel RX Address Register

BCRXADDRResetValue

uint32_t

Broadcast Channel RX Address Register

BCRXADDRWriteMask

uint32_t

Broadcast Channel RX Address Register

BCRXRPTR

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRColdResetValue

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRForcedBits

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRForcedFlippedBits

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRReadMask

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRResetMask

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRResetValue

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXRPTRWriteMask

uint32_t

Broadcast Channel RX Read Pointer Register

BCRXSIZE

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEColdResetValue

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEForcedBits

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEForcedFlippedBits

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEReadMask

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEResetMask

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEResetValue

uint32_t

Broadcast Channel RX Size Register

BCRXSIZEWriteMask

uint32_t

Broadcast Channel RX Size Register

BCRXWPTR

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRColdResetValue

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRForcedBits

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRForcedFlippedBits

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRReadMask

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRResetMask

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRResetValue

uint32_t

Broadcast Channel RX Write Pointer Register

BCRXWPTRWriteMask

uint32_t

Broadcast Channel RX Write Pointer Register

BCTXADDR

uint32_t

Broadcast Channel TX Address Register

BCTXADDRColdResetValue

uint32_t

Broadcast Channel TX Address Register

BCTXADDRForcedBits

uint32_t

Broadcast Channel TX Address Register

BCTXADDRForcedFlippedBits

uint32_t

Broadcast Channel TX Address Register

BCTXADDRReadMask

uint32_t

Broadcast Channel TX Address Register

BCTXADDRResetMask

uint32_t

Broadcast Channel TX Address Register

BCTXADDRResetValue

uint32_t

Broadcast Channel TX Address Register

BCTXADDRWriteMask

uint32_t

Broadcast Channel TX Address Register

BCTXRPTR

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRColdResetValue

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRForcedBits

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRForcedFlippedBits

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRReadMask

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRResetMask

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRResetValue

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXRPTRWriteMask

uint32_t

Broadcast Channel TX Read Pointer Register

BCTXSIZE

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEColdResetValue

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEForcedBits

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEForcedFlippedBits

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEReadMask

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEResetMask

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEResetValue

uint32_t

Broadcast Channel TX Size Register

BCTXSIZEWriteMask

uint32_t

Broadcast Channel TX Size Register

BCTXWPTR

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRColdResetValue

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRForcedBits

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRForcedFlippedBits

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRReadMask

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRResetMask

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRResetValue

uint32_t

Broadcast Channel TX Write Pointer Register

BCTXWPTRWriteMask

uint32_t

Broadcast Channel TX Write Pointer Register

BUFCAP

uint32_t

Codec Buffers Capabilities Register

BUFCAPColdResetValue

uint32_t

Codec Buffers Capabilities Register

BUFCAPForcedBits

uint32_t

Codec Buffers Capabilities Register

BUFCAPForcedFlippedBits

uint32_t

Codec Buffers Capabilities Register

BUFCAPReadMask

uint32_t

Codec Buffers Capabilities Register

BUFCAPResetMask

uint32_t

Codec Buffers Capabilities Register

BUFCAPResetValue

uint32_t

Codec Buffers Capabilities Register

BUFCAPWriteMask

uint32_t

Codec Buffers Capabilities Register

CCTRL

uint32_t

Codec Control Register

CCTRLColdResetValue

uint32_t

Codec Control Register

CCTRLForcedBits

uint32_t

Codec Control Register

CCTRLForcedFlippedBits

uint32_t

Codec Control Register

CCTRLReadMask

uint32_t

Codec Control Register

CCTRLResetMask

uint32_t

Codec Control Register

CCTRLResetValue

uint32_t

Codec Control Register

CCTRLWriteMask

uint32_t

Codec Control Register

Class

*void

Class object

Component

*void

Pointer to component object if part of component

DCCTRL

uint32_t

DMA Channel Control Register

DCCTRLColdResetValue

uint32_t

DMA Channel Control Register

DCCTRLForcedBits

uint32_t

DMA Channel Control Register

DCCTRLForcedFlippedBits

uint32_t

DMA Channel Control Register

DCCTRLReadMask

uint32_t

DMA Channel Control Register

DCCTRLResetMask

uint32_t

DMA Channel Control Register

DCCTRLResetValue

uint32_t

DMA Channel Control Register

DCCTRLWriteMask

uint32_t

DMA Channel Control Register

DCICTRL

uint32_t

DMA Channel IRQ Control Register

DCICTRLColdResetValue

uint32_t

DMA Channel IRQ Control Register

DCICTRLForcedBits

uint32_t

DMA Channel IRQ Control Register

DCICTRLForcedFlippedBits

uint32_t

DMA Channel IRQ Control Register

DCICTRLReadMask

uint32_t

DMA Channel IRQ Control Register

DCICTRLResetMask

uint32_t

DMA Channel IRQ Control Register

DCICTRLResetValue

uint32_t

DMA Channel IRQ Control Register

DCICTRLWriteMask

uint32_t

DMA Channel IRQ Control Register

DCMAP

uint32_t

DMA Channel VS Mapping Register

DCMAPColdResetValue

uint32_t

DMA Channel VS Mapping Register

DCMAPForcedBits

uint32_t

DMA Channel VS Mapping Register

DCMAPForcedFlippedBits

uint32_t

DMA Channel VS Mapping Register

DCMAPReadMask

uint32_t

DMA Channel VS Mapping Register

DCMAPResetMask

uint32_t

DMA Channel VS Mapping Register

DCMAPResetValue

uint32_t

DMA Channel VS Mapping Register

DCMAPWriteMask

uint32_t

DMA Channel VS Mapping Register

DCSTAT

uint32_t

DMA Channel Status Register

DCSTAT2

uint32_t

DMA Channel Extended Status Register

DCSTAT2ColdResetValue

uint32_t

DMA Channel Extended Status Register

DCSTAT2ForcedBits

uint32_t

DMA Channel Extended Status Register

DCSTAT2ForcedFlippedBits

uint32_t

DMA Channel Extended Status Register

DCSTAT2ReadMask

uint32_t

DMA Channel Extended Status Register

DCSTAT2ResetMask

uint32_t

DMA Channel Extended Status Register

DCSTAT2ResetValue

uint32_t

DMA Channel Extended Status Register

DCSTAT2WriteMask

uint32_t

DMA Channel Extended Status Register

DCSTATColdResetValue

uint32_t

DMA Channel Status Register

DCSTATForcedBits

uint32_t

DMA Channel Status Register

DCSTATForcedFlippedBits

uint32_t

DMA Channel Status Register

DCSTATReadMask

uint32_t

DMA Channel Status Register

DCSTATResetMask

uint32_t

DMA Channel Status Register

DCSTATResetValue

uint32_t

DMA Channel Status Register

DCSTATWriteMask

uint32_t

DMA Channel Status Register

DEFADDR

uint32_t

Default Address Register

DEFADDRColdResetValue

uint32_t

Default Address Register

DEFADDRForcedBits

uint32_t

Default Address Register

DEFADDRForcedFlippedBits

uint32_t

Default Address Register

DEFADDRReadMask

uint32_t

Default Address Register

DEFADDRResetMask

uint32_t

Default Address Register

DEFADDRResetValue

uint32_t

Default Address Register

DEFADDRWriteMask

uint32_t

Default Address Register

DLCAP

uint32_t

DMA Layer Capabilities Register

DLCAPColdResetValue

uint32_t

DMA Layer Capabilities Register

DLCAPForcedBits

uint32_t

DMA Layer Capabilities Register

DLCAPForcedFlippedBits

uint32_t

DMA Layer Capabilities Register

DLCAPReadMask

uint32_t

DMA Layer Capabilities Register

DLCAPResetMask

uint32_t

DMA Layer Capabilities Register

DLCAPResetValue

uint32_t

DMA Layer Capabilities Register

DLCAPWriteMask

uint32_t

DMA Layer Capabilities Register

DLCTRL

uint32_t

DMA Layer Control Register

DLCTRLColdResetValue

uint32_t

DMA Layer Control Register

DLCTRLForcedBits

uint32_t

DMA Layer Control Register

DLCTRLForcedFlippedBits

uint32_t

DMA Layer Control Register

DLCTRLReadMask

uint32_t

DMA Layer Control Register

DLCTRLResetMask

uint32_t

DMA Layer Control Register

DLCTRLResetValue

uint32_t

DMA Layer Control Register

DLCTRLWriteMask

uint32_t

DMA Layer Control Register

DLSTAT

uint32_t

DMA Layer Status Register

DLSTATColdResetValue

uint32_t

DMA Layer Status Register

DLSTATForcedBits

uint32_t

DMA Layer Status Register

DLSTATForcedFlippedBits

uint32_t

DMA Layer Status Register

DLSTATReadMask

uint32_t

DMA Layer Status Register

DLSTATResetMask

uint32_t

DMA Layer Status Register

DLSTATResetValue

uint32_t

DMA Layer Status Register

DLSTATWriteMask

uint32_t

DMA Layer Status Register

DMAChannels

[temu_IfaceRef; 8]/ <unknown>

DMA Channel Interfaces

GENCAP

uint32_t

Codec General Capabilities Register

GENCAPColdResetValue

uint32_t

Codec General Capabilities Register

GENCAPForcedBits

uint32_t

Codec General Capabilities Register

GENCAPForcedFlippedBits

uint32_t

Codec General Capabilities Register

GENCAPReadMask

uint32_t

Codec General Capabilities Register

GENCAPResetMask

uint32_t

Codec General Capabilities Register

GENCAPResetValue

uint32_t

Codec General Capabilities Register

GENCAPWriteMask

uint32_t

Codec General Capabilities Register

LLSTAT

uint32_t

Lane Layer Status Register

LLSTATColdResetValue

uint32_t

Lane Layer Status Register

LLSTATForcedBits

uint32_t

Lane Layer Status Register

LLSTATForcedFlippedBits

uint32_t

Lane Layer Status Register

LLSTATReadMask

uint32_t

Lane Layer Status Register

LLSTATResetMask

uint32_t

Lane Layer Status Register

LLSTATResetValue

uint32_t

Lane Layer Status Register

LLSTATWriteMask

uint32_t

Lane Layer Status Register

LocalName

*char

Local name (in component, if applicable)

LoggingFlags

uint64_t

Flags for logging info

Name

*char

Object name

ObjectID

uint64_t

Unique ObjectID.

RLSTAT

uint32_t

Retry Layer Status Register

RLSTATColdResetValue

uint32_t

Retry Layer Status Register

RLSTATForcedBits

uint32_t

Retry Layer Status Register

RLSTATForcedFlippedBits

uint32_t

Retry Layer Status Register

RLSTATReadMask

uint32_t

Retry Layer Status Register

RLSTATResetMask

uint32_t

Retry Layer Status Register

RLSTATResetValue

uint32_t

Retry Layer Status Register

RLSTATWriteMask

uint32_t

Retry Layer Status Register

SPFIEN

uint32_t

SpaceFibre Enable Register

SPFIENColdResetValue

uint32_t

SpaceFibre Enable Register

SPFIENForcedBits

uint32_t

SpaceFibre Enable Register

SPFIENForcedFlippedBits

uint32_t

SpaceFibre Enable Register

SPFIENReadMask

uint32_t

SpaceFibre Enable Register

SPFIENResetMask

uint32_t

SpaceFibre Enable Register

SPFIENResetValue

uint32_t

SpaceFibre Enable Register

SPFIENWriteMask

uint32_t

SpaceFibre Enable Register

SpfiPort

temu_IfaceRef/ <unknown>

SpaceFibre port to the other side of the link.

TS

uint32_t

Time-slot Register

TSCTRL

uint32_t

Time-slot Control Register

TSCTRLColdResetValue

uint32_t

Time-slot Control Register

TSCTRLForcedBits

uint32_t

Time-slot Control Register

TSCTRLForcedFlippedBits

uint32_t

Time-slot Control Register

TSCTRLReadMask

uint32_t

Time-slot Control Register

TSCTRLResetMask

uint32_t

Time-slot Control Register

TSCTRLResetValue

uint32_t

Time-slot Control Register

TSCTRLWriteMask

uint32_t

Time-slot Control Register

TSColdResetValue

uint32_t

Time-slot Register

TSForcedBits

uint32_t

Time-slot Register

TSForcedFlippedBits

uint32_t

Time-slot Register

TSReadMask

uint32_t

Time-slot Register

TSResetMask

uint32_t

Time-slot Register

TSResetValue

uint32_t

Time-slot Register

TSWriteMask

uint32_t

Time-slot Register

TXLEN

uint32_t

Time-slot Length Register

TXLENColdResetValue

uint32_t

Time-slot Length Register

TXLENForcedBits

uint32_t

Time-slot Length Register

TXLENForcedFlippedBits

uint32_t

Time-slot Length Register

TXLENReadMask

uint32_t

Time-slot Length Register

TXLENResetMask

uint32_t

Time-slot Length Register

TXLENResetValue

uint32_t

Time-slot Length Register

TXLENWriteMask

uint32_t

Time-slot Length Register

TimeSource

*void

Time source object

VCADDR

uint32_t

Virtual Channel Address Register

VCADDRColdResetValue

uint32_t

Virtual Channel Address Register

VCADDRForcedBits

uint32_t

Virtual Channel Address Register

VCADDRForcedFlippedBits

uint32_t

Virtual Channel Address Register

VCADDRReadMask

uint32_t

Virtual Channel Address Register

VCADDRResetMask

uint32_t

Virtual Channel Address Register

VCADDRResetValue

uint32_t

Virtual Channel Address Register

VCADDRWriteMask

uint32_t

Virtual Channel Address Register

VCCTRL

uint32_t

Virtual Channel Control Register

VCCTRLColdResetValue

uint32_t

Virtual Channel Control Register

VCCTRLForcedBits

uint32_t

Virtual Channel Control Register

VCCTRLForcedFlippedBits

uint32_t

Virtual Channel Control Register

VCCTRLReadMask

uint32_t

Virtual Channel Control Register

VCCTRLResetMask

uint32_t

Virtual Channel Control Register

VCCTRLResetValue

uint32_t

Virtual Channel Control Register

VCCTRLWriteMask

uint32_t

Virtual Channel Control Register

VCDCTRL

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLColdResetValue

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLForcedBits

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLForcedFlippedBits

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLReadMask

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLResetMask

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLResetValue

uint32_t

Virtual Channel Descriptor Control Register

VCDCTRLWriteMask

uint32_t

Virtual Channel Descriptor Control Register

VCKEY

uint32_t

Virtual Channel Destination Key Register

VCKEYColdResetValue

uint32_t

Virtual Channel Destination Key Register

VCKEYForcedBits

uint32_t

Virtual Channel Destination Key Register

VCKEYForcedFlippedBits

uint32_t

Virtual Channel Destination Key Register

VCKEYReadMask

uint32_t

Virtual Channel Destination Key Register

VCKEYResetMask

uint32_t

Virtual Channel Destination Key Register

VCKEYResetValue

uint32_t

Virtual Channel Destination Key Register

VCKEYWriteMask

uint32_t

Virtual Channel Destination Key Register

VCMAXLEN

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENColdResetValue

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENForcedBits

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENForcedFlippedBits

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENReadMask

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENResetMask

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENResetValue

uint32_t

Virtual Channel RX Max Length Register

VCMAXLENWriteMask

uint32_t

Virtual Channel RX Max Length Register

VCRXDADDR

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRColdResetValue

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRForcedBits

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRForcedFlippedBits

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRReadMask

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRResetMask

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRResetValue

uint32_t

VC TX Descriptor Table Address Register

VCRXDADDRWriteMask

uint32_t

VC TX Descriptor Table Address Register

VCSTAT

uint32_t

Virtual Channel Status Register

VCSTATColdResetValue

uint32_t

Virtual Channel Status Register

VCSTATForcedBits

uint32_t

Virtual Channel Status Register

VCSTATForcedFlippedBits

uint32_t

Virtual Channel Status Register

VCSTATReadMask

uint32_t

Virtual Channel Status Register

VCSTATResetMask

uint32_t

Virtual Channel Status Register

VCSTATResetValue

uint32_t

Virtual Channel Status Register

VCSTATWriteMask

uint32_t

Virtual Channel Status Register

VCTS1

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ColdResetValue

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ForcedBits

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ForcedFlippedBits

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ReadMask

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ResetMask

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1ResetValue

uint32_t

Virtual Channel Time-slot 1 Register

VCTS1WriteMask

uint32_t

Virtual Channel Time-slot 1 Register

VCTS2

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ColdResetValue

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ForcedBits

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ForcedFlippedBits

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ReadMask

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ResetMask

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2ResetValue

uint32_t

Virtual Channel Time-slot 2 Register

VCTS2WriteMask

uint32_t

Virtual Channel Time-slot 2 Register

VCTXDADDR

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRColdResetValue

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRForcedBits

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRForcedFlippedBits

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRReadMask

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRResetMask

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRResetValue

uint32_t

VC TX Descriptor Table Address Register

VCTXDADDRWriteMask

uint32_t

VC TX Descriptor Table Address Register

config.irq

uint8_t

Interrupt number

config.littleEndian

uint8_t

Endianess of memory interface.

config.numDMAChannels

uint8_t

Number of DMA channels/engines available (1-8).

config.numExternalFIFOs

uint8_t

Number of external FIFO interfaces available (0-32).

config.numRXDescs

uint32_t

Number of RX descriptors held in VCRXDADDR tables (128, 256, 512 or 1024).

config.numTXDescs

uint32_t

Number of TX descriptors held in VCTXDADDR tables (64, 128, 256 or 512).

config.numVirtualChannels

uint8_t

Number of virtual channels available (1-32).

externalFIFOs

[temu_IfaceRef; 32]/ <unknown>

External FIFO interfaces (e.g. for connections to the GRSPWROUTER)

irqCtrl

temu_IfaceRef/ <unknown>

IRQ controller.

packetQueues

[temu_Vector; 33]

Reception Packet queues

pnp.bar

uint32_t

AMBA plug and play base address register

pnp.config

uint32_t

AMBA plug and play config word

Interfaces

Name Type Description

ApbIface

ApbIface

APB P&P interface.

DeviceIface

DeviceIface

MemAccessIface

MemAccessIface

Registers

temu::RegisterIface

Register Interface Impl.

SpfiPortIface

temu::SpfiPortIface

SpaceFibre Port Interface of this device.

Commands

Name Description

delete

Dispose instance of GRSPFI

Limitations

GRSPFI ignores any incoming flow control token (FTC) control words, and does not send out any FTCs either.

It has a virtually infinitely large receive buffer for every virtual channel, but will never send out any FTCs to the other end in order to communicate that.

When GRSPFI sends out packets, it will ignore any FTCs received for the channel it wants to send over. Even if the other side indicates that this channel has ran out of credits for a VC, GRSPFI will send packets.